 |
| No. |
CIC No. |
Topic of Chips |
Status |
| 1 |
T08-85F-01 |
8-digit 4-valued Exponential Bidirectional Associative Memory (eBAM) |
Partial Work |
| 2 |
T06-87B-63a |
A Word-Slice Pipelined Maximum Selector for Priority Queues |
Work |
| 3 |
T06-87C-11 |
Radix-4/2 64b/32b Signed/Unsigned Integer Divider |
Work |
| 4 |
T06-87D-07 |
Low-Power High-Speed FPGA for DSP Applications |
Work |
| 5 |
T06-87D-10 |
A 64-bit Fast PLA-styled all-N-transistor (ANT) logic Carry
Lookahead Adder |
Work |
| 6 |
T06-87E-17 |
4Kb Single-ended SRAM with High Test Coverage and Short Test Time |
Partial Work |
| 7 |
T06-88B-15 |
A Practical Load-Optimized VCO Design for Low-Jitter 5V 500MHz
Digital Phase-Locked Loop |
Work |
| 8 |
T06-88B-50a |
A Chip for Reducing The Testing Cost of LCD Drivers |
Work |
| 9 |
T06-88B-51a |
A Fast 63-6 Inner Product Processor |
Partial Work |
| 10 |
U05-88C-06u |
Current Integration Module of Smart Battery Monitor |
Work |
| 11 |
U05-88D-05u |
An Area-Saving 8-bit A/D Converter Using a Binary Searching Scheme |
Work |
| 12 |
U05-88D-05u |
A Practical Lead-Compensation Design for Low-Voltage Offset High
Gain-Frequency Operational Amplifier |
Work |
| 13 |
U05-88D-21u |
A Practical Design of 5V 300 MHz Short Lock-Time Digital
Phase-locked Loop |
Work |
| 14 |
U05-89B-11u |
Dynamic CMOS Comparators with Lower Transistor Count |
Work |
| 15 |
U05-89B-16u |
Delta-sigma A/D Converter |
Work |
| 16 |
U05-89B-18u |
A Power-Saving Fast Half-Swing 8-bit CLA adder |
Partial Work |
| 17 |
U05-89B-21u |
A Fast Inner Product Processor in Neural Networks |
Work |
| 18 |
T06-89C-54a |
A Design of Fast Bipolar Inner Product Processor for Neural
Associative Memory Networks |
Work |
| 19 |
T06-89C-55a |
A Fast Tagged Sorter Used in 100/10 Mbps Routers |
Work |
| 20 |
U05-89C-22u |
An Area-Saving Decoder for 258x8 ROM |
Work |
| 21 |
D35-89D-01 |
A Power-Saving Half-Swing 1.0 GHz 8-bit Pipelining CLA Adder |
Partial Work |
| 22 |
S35-89I-03u |
A 1GHz Digital DLL With Negative Delays Using Single-Shot Locking
Method |
Fail |
| 23 |
S35-89I-04u |
Post Amplifiers For A 16Mbps Infrared Transceiver Module |
Partial Work |
| 24 |
S35-89I-05u |
Transimpedance Preamplifier For 16 Mbps Infrared Transceiver Module |
Partial Work |
| 25 |
S35-89I-07u |
A 1.25 GHz 8-bit Tree-Structured Carry Lookahead Adder |
Work |
| 26 |
S35-89J-03a |
A 32-bit 1.25GHz Pipelined Tree-Structured CLA |
Fail |
| 27 |
S35-89J-18 |
Design of A Cycle-Efficient 64b/32b Integer Divider Using A
Table-Sharing Method |
Work |
| 28 |
S35-90A-15u |
Robust Reference Clock Generator Design for DDR Synchronous Devices |
Work |
| 29 |
S35-90A-16u |
Address Transition Detector Design with High Noise Immunity |
Work |
| 30 |
S35-90A-17u |
Infrared Transceiver Module |
Partial Work |
| 31 |
S35-90A-49 |
Analog Front-End of Digital Cordless Headset Baseband Controller |
Partial Work |
| 32 |
M25-90C-04 |
Programmable DLL-based Frequency Multiplier |
Work |
| 33 |
S35-90D-04u |
DRAM module with an Adaptive Refreshing Period |
Work |
| 34 |
M25-90D-01 |
6-T SRAM Cell Using Dual Threshold Voltage Transistor and Low Power
Quenchers |
Work |
| 35 |
S35-90E-06u |
Thermal Sensor and Control Chip |
Work |
| 36 |
S35-91A-09u |
An DC/DC Converter with Built-in Voltage Detector |
Work |
| 37 |
R18-91A-02b |
Synchronous/Asynchronous 4T SRAM Using Low-Vthn Bitline Drivers And
High-Vthp Latches |
Work |
| 38 |
M25-91B-01 |
High voltage generator for flash memory |
Work |
| 39 |
S35-91B-11u |
A boosted voltage generator used in memory devices |
Partial Work |
| 40 |
S35-91B-12u |
Fractional-N Frequency Divider with Digital Control |
Fail |
| 41 |
S35-91B-13u |
Cascade address transition detector design with noise immunity |
Work |
| 42 |
S35-91B-16u |
Thermal sensor chip with DC bias stability |
Partial Work |
| 43 |
S35-91C-12a |
ROM-less direct digital frequency synthesizer (DDFS) |
Work |
| 44 |
S35-91C-66u |
Thermal sensor chip with a DC regulator |
Fail |
| 45 |
M25-91C-16b |
Voltage Boost Level Clamping Circuit for A Flash Memory |
Partial Work |
| 46 |
M25-91E-10b |
High Sensitivity CMOS Voltage to Frequency Converter |
Work |
| 47 |
M25-91E-11 |
Low-power Small-Area Digital I/O Cell |
Partial Work |
| 48 |
U05-92A-01 |
8-bit 100MHz D/A Converter |
Partial Work |
| 49 |
D35-92A-13b |
Stable clock generator with temperature compensation |
Work |
| 50 |
D35-92A-15b |
High PSRR and small area regulator for embedded chip |
Partial Work |
| 51 |
D35-92B-06a |
Embedded system integrated biological nerve stimulation chip |
Fail |
| 52 |
T18-92C-03 |
A CMOS SRAM Using Dynamic Threshold Voltage Wordline Transistors |
Partial Work |
| 53 |
S35-92C-19a |
NTSC Digital Video Decoder |
Work |
| 54 |
S35-92C-20a |
Variable-Length to Fixed-Length Codec |
Work |
| 55 |
S35-92C-21a |
A High Speed Phase Adjustable ROM-less DDFS for DPLL |
Work |
| 56 |
S35-92C-26b |
An adjustable negative phase shifter using a single-shot locking
method |
Partial Work |
| 57 |
M25-92C-07 |
Switched-Current 3-bit CMOS True Random Number Generator |
Work |
| 58 |
M25-93A-21 |
High Sensitive Linear Voltage to Frequency
Converter |
Work |
| 59 |
M25-93B-12 |
Power-aware Design of An 8-Bit Pipelining
Asynchronous CLA Using Data Transition Detection |
Work |
| 60 |
M25-93B-31 |
Low-Voltage Differential Signals (LVDS)
transceiver |
Fail |
| 61 |
M25-93B-32 |
Clock Recovery and Data Recovery Based on PLL for
LVDS Transceivers |
Partial Work |
| 62 |
D35-93B-08a |
Multi-stimulation frequency embedded system
integrated biological nerve stimulation chip |
Fail |
| 63 |
D35-93C-04 |
Video Sync Separator |
Work |
| 64 |
D35-93C-06 |
8-bit 100MHz D/A Converter |
Partial Work |
| 65 |
D35-93C-09a |
Codec Design For Variable-Length To Fixed-Length
Data Compression By Using Multi-Symbol Encoding |
Work |
| 66 |
T18-93C-28 |
A 4Kb Low-Power SRAM Design |
Work |
| 67 |
D35-93D-04 |
Low Jitter PLL-Based 80 MHz ADC Sampling Clock
Generator |
Work |
| 68 |
D35-93D-09a |
A 2K/8K multimode fast fourier transformation for
OFDM of DVB-T |
Work |
| 69 |
D35-93D-11a |
Using 2D3L Comb Fillter In NTSC Digital Video
Decoder |
Work |
| 70 |
D35-93D-27b |
2 Low-voltage Two-stage Single-ended Folded-cascode
Operational Amplifiers |
Partial Work |
| 71 |
D35-93E-06 |
A 95 MHz / 70 dB CMOS Digital Variable Gain
Amplifier |
Partial Work |
| 72 |
D35-93E-15 |
Spike Filter |
Work |
| 73 |
D35-93E-19b |
A LDO Linear Regulator with Modified-NMCF
Frequency Compensation which, does not consider ESR of Loading Capacitor |
Partial Work |
| 74 |
D35-93E-20b |
5-bit DAC with small layout area |
Work |
| 75 |
D35-93F-02 |
Power-Aware 8×8 Multiplier Design Using
2-Dimensional Dynamic Bypassing |
Partial Work |
| 76 |
D35-94A-01 |
A temperature-compensated anti-aliasing filter with tunable
bandwidth for DVB-T system applications |
Partial Work |
| 77 |
D35-94A-02 |
Low Jitter 80 MHz PLL for DVB-T |
Partial Work |
| 78 |
D35-94A-03 |
A low noise amplifier for neural recording applications |
Partial Work |
| 79 |
D35-94A-04 |
Multi-stimulation frequency embedded system integrated biological
nerve stimulation chip |
Work |
| 80 |
D35-94B-02 |
A CMOS Variable Gain Amplifier with DC/AC Switched Control |
Partial Work |
| 81 |
D35-94B-03a |
Low-power multi-stimulation frequency and bi-phase-stimulation
current embedded system integrated biological nerve stimulation chip |
Partial Work |
| 82 |
D35-94B-04a |
A neural stimulation、recording and impedance measuring system for
implantable applications |
Work |
| 83 |
D35-94C-98 |
A 8 bits 20 MS/s pipeline ADC |
Partial Work |
| 84 |
T18-94D-02a |
A 868/915 MHz Band Physical Layer of ZigBee Transceiver |
Work |
| 85 |
T18-94D-03a |
A Low-Power All-Digital Phase-Locked Loop Design for SoC
Applications |
Work |
| 86 |
T18-94D-10 |
Low-power bus driver design based on a charge recycle technique |
Partial Work |
| 87 |
T18-94D-12 |
Low-power 8 bit Carray-lookahead adder using dual-Vth Domino Logic |
Work |
| 88 |
T18-94D-65 |
A Low-Power Sequential Access Memory for OFDM Demodulator of DVB-T
Receivers |
Partial Work |
| 89 |
T18-94E-01a |
A 868/915 MHz Band Physical Layer Design for IEEE 802.15.4 |
Work |
| 90 |
T18-94E-76b |
A 5-bit 2.4-MS/s Workive Approximation Analog-to-Digital Converter |
Work |
| 91 |
T18-94E-82b |
Power-aware 8×8 multiplier design using 2-dimensional dynamic
bypassing |
Work |
| 92 |
T18-94E-107b |
A Low-Power Sequential Access Memory using Negative Word-line
Voltage |
Work |
| 93 |
D35-94E-03a |
An embedded SOC for neural stimulation and measuring |
Partial Work |
| 94 |
T18-95A-27 |
Dual-OPA coil driver for heat dissipation of SOC’s |
Fail |
| 95 |
T18-95B-05a |
COFDM Demodulator of DVB-T |
Partial Work |
| 96 |
T18-95B-41t |
A PNP type BJT layout testkey for CMOS process
applications |
Fail |
| 97 |
D35-95C-06a |
An embedded SOC for neural stimulation and
measuring |
Work |
| 98 |
D35-95C-45 |
An embedded SOC for neural measuring |
Work |
| 99 |
D35-95D-27 |
A low-noise instrumentation amplifier for
bio-medical applications |
Fail |
| 100 |
D35-95D-30 |
C-less and R-less ASK demodulator for wirelesss
implantable devices |
Work |
| 101 |
T18-95E-06a |
A 2.45 GHz Band Physical Layer of ZigBee
Transceiver |
Partial Work |
| 102 |
T18-95E-07a |
Multi-Symbol Codec Design for Variable-Length Code
to Fixed-Length Code |
Work |
| 103 |
T18-95E-35 |
One-time programmable ROM using a typical CMOS
process |
Work |
| 104 |
T18-95E-122t |
The testkey of the high voltage characteristic for
transistors in a typical CMOS process |
Work |
| 105 |
T18-95E-131 |
A New 3-T ROM Cell Compatible With Typical CMOS
Process |
Work |
| 106 |
D35-95E-04 |
A low power instrumentation for bladder pressure
signaling |
Work |
| 107 |
D35-95E-09 |
Ultra Low-Power Direct Digital Frequency
Synthesizer Using a Nonlinear Digital-to-Analog Converter |
Partial Work |
| 108 |
T18-96A-26 |
A novel 10-T full adder with low power and high speed characteristic |
Work |
| 109 |
D35-96A-07 |
A 1.8/3.3/5 V Mixed-Voltage-Tolerant I/O Cell Design |
Work |
| 110 |
D35-96A-24t |
Testkey for the breakdown characteristic of electrostatic discharge
protection elements |
Work |
| 111 |
D35-96A-38t |
Testkey for the breakdown characteristic of stacked-PMOS implemented
in mixed-voltage-tolerant I/O circuit |
Work |
| 112 |
D35-96B-01a |
Physical layer design for FlexRay automotive communication system |
Work |
| 113 |
D35-96B-46t |
TestKey for ESD protection capability with layout parameters of
stacked PMOS |
Producing |
| 114 |
T18-96C-02a |
COFDM Demodulator of DVB-H |
Producing |
| 115 |
T18-96C-03a |
A 2K/4K/8K multimode fast Fourier transformation for OFDM of DVB-H |
Producing |
| 116 |
T18-96C-05a |
One-time programmable ROM used in DDFS |
Producing |
| 117 |
D35-96C-01a |
A Low-Power 2-dimensional Bypassing Multiplier |
Producing |
| 118 |
D35-96C-14 |
Design on Fully Bidirectional Mixed-Voltage-Tolerant I/O Cell |
Producing |
| 119 |
D35-96C-40 |
Fully Mixed-Voltage-Tolerant I/O Cell Design |
Producing |
| 120 |
T13L-96C-02a |
A ROM-less DDFS Based on a Modified Parabolic Polynomial
Interpolation Method |
Producing |
| 121 |
D35-96D-10 |
A low power multi-application instrumentation for bladder pressure
signaling |
Work |
| 122 |
D35-96D-39t |
Testkey for Substrate-Triggered Stacked PMOS |
Producing |