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| No. | Topic | Project No. | PDF Download |
| 329 | P. Vellanki, V. N. Kolakaluri, Y.-C. Chang, L S S P. K. Chodisetti, M. M.-C. Chou, and C.-C. Wang, “Active gate driver design using differential timing-based Miller detector for power MOSFET,“ 2024 IEEE Asia Pacific Conference on Circuits and Systems (2024 APCCAS), (accepted, paper ID = 9013), Aug. 2024. | NSTC 112-2221- E-110-063-MY3 |
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| 328 | S. Majumder, L. K. S. Tolentino, O. L. J. Al. Jose‡, V. N. Kolakaluri, M. M.-C. Chou, and C.-C. Wang, “A Multi-Level Power Gating Logic Controlled Driver for A 10-V Power Transistor Using 180-nm High Voltage BCD Process,” 2024 21st Inter. SOC Design Conference (2024 ISOCC), (accepted paper ID = 2), May 2024. | NSTC 111-2623-E-110-002- |
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| 327 | P. Vellanki, H.-C. Tseng, Y.-X. Chen, L S S P. K. Chodisetti, and C.-C. Wang, “An on-chip temperature sensor with 1°C resolution and wide detection range using 180-nm CMOS process,” 2024 21st Inter. SOC Design Conference (2024 ISOCC), (accepted paper ID = 1), May 2024. | NSTC 112-2221-E-110-063-MY3 |
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| 326 | J.-J. Chen, R. G. B. Sangalang, H.-C. Wu, and C.-C. Wang, “A highly reliable XNOR-XOR-RO PUF design for IoT security applications,” 2024 14th IEEE Symposium on Computer Applications & Industrial Electronics (2024 ISCAIE), (accepted, paper ID = 46), May 2024. | MOST 110-2221-E-110-063-MY2 |
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| 325 | C.-Y. Lo, L. K. S. Tolentino, J.-Y. Ker, J. S. Walling, Y. Yi, and C.-C. Wang, "A 266.7 TOPS/W computing-in memory using single-ended 6T 4-Kb SRAM in 16-nm FinFET CMOS process," 2024 IEEE 6th Inter. Conf. on Artificial Intelligence Circuits and Systems (2024 AICAS), Apr. 2024. DOI: 10.1109/AICAS59952.2024.10595553 | NSTC 110-2221-E-110-063-MY2 |
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| 324 | J.-Y. Ker, L. K. S. Tolentino, C.-Y. Lo, T.-J. Lee, and C.-C. Wang, "GA-Optimized 6.0-Gbps DDR5 SDRAM I/O buffer design for 16-nm FinFET CMOS process," 2024 IEEE 6th Inter. Conf. on Artificial Intelligence Circuits and Systems (2024 AICAS), Apr. 2024. DOI: 10.1109/AICAS59952.2024.10595891 | NSTC 110-2221-E-110-063-MY2 |
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| 323 | C.-C. Wang, S.-H. Lou, H.-C. Wu, R. G. B. Sangalang, C.-P. Jou, H. Hsia, and L.-C. Cho, "A 54.61-GOPS 96.35-mW digital logic accelerator for underwater object recognition DNN using 40-nm CMOS process," 2024 IEEE 6th Inter. Conf. on Artificial Intelligence Circuits and Systems (2024 AICAS), Apr. 2024. DOI: 10.1109/AICAS59952.2024.10595977 | Download | |
| 322 | O. L. J. A. Jose, Y.-C. Chang, V. N. Kolakaluri, C. B. Co, M. M.-C. Chou, and C.-C. Wang, "A 10-MHz 5-V on-chip 6-layer multi-level digital transformer using T18HVG2 process," 2024 IEEE International Symposium on Circuits and Systems (2024 ISCAS), Jan. 2024. DOI: 10.1109/ISCAS58744.2024.10558498 | Download | |
| 321 | S. Majumber, V. N. Kolakaluri, O. L. J. A. Jose, and C.-C. Wang, "A wide range 2-to-2048 division ratio frequency divider using 40-nm CMOS process," 2024 IEEE International Symposium on Circuits and Systems (2024 ISCAS), May 2024. DOI: 10.1109/ISCAS58744.2024.10558236 | Download | |
| 320 | R. G. B. Sangalang, C.-L. Lee, Y.-W. Shen, C. B. Co, and C.-C. Wang, “A 4-kHz per °C high linearity on-chip temperature sensor implemented using 40-nm CMOS process,” 2023 IEEE Asia Pacific Conference on Circuits and Systems (2023 APCCAS), (accepted, paper ID = 33), Nov. 2023. | MOST 110-2221-E-110-063-MY2 |
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| 319 | J.-Y. Ke, L. K. S. Tolentino, C.-Y. Lo, T.-J. Lee, and C.-C. Wang, “A 2.6-GHz I/O buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS process,” 2023 IEEE Asia Pacific Conference on Circuits and Systems (2023 APCCAS), Nov. 2023. DOI: 10.1109/APCCAS60141.2023.00068 | Download | |
| 318 | R. G. B. Sangalang, W.-Z. Chen, and C.-C. Wang, “A 1-kb Sub-1 fJ/b per access CAM design using 40-nm CMOS process,” 2023 IEEE Asia Pacific Conference on Circuits and Systems (2023 APCCAS), Nov. 2023. DOI: 10.1109/APCCAS60141.2023.00023 | MOST 110-2221-E-110-063-MY2 |
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| 317 | O. L. J. A. Jose, V. N. Kolakaluri, J.-M. Kuo, M. M.-C. Chou, and C.-C. Wang, “2-level Miller detection-based high side gate driver design for power MOSFETs,“ 2023 IEEE Asia Pacific Conference on Circuits and Systems (2023 APCCAS), pp.266-270, Nov. 2023. DOI: 10.1109/APCCAS60141.2023.00067 | NSTC 111-2623- E-110-002- |
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| 316 | L. K. S. Tolentino, J.-Y. Ke, C.-Y. Lo, and C.-C. Wang, “Using machine learning techniques to determine DDR5 SDRAM I/O buffer’s slew rate at different PVT variations,” 2023 IEEE Inte. Conf. on Integrated Intelligence and Communication Systems (2023 ICIICS), pp. 1-4, Nov. 2023. DOI: 10.1109/ICIICS59993.2023.10421013 | NSTC 110-2221-E-110-063-MY2 |
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| 315 | R. G. B. Sangalang, Y.-W. Shen, S. Reddy, L. K. S. Tolentino, and C.-C. Wang, “Passiveless digitally controlled oscillator with embedded PVT detector using 40-nm CMOS,” 2023 IEEE 15th International Conference on ASIC (2023 ASICON), Oct. 2023. DOI: 10.1109/ASICON58565.2023.10396334 (invited paper) | MOST 110-2221-E-110-063-MY2 |
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| 314 | R. G. B. Sangalang, S.-H. Luo and C.-C. Wang, “A High Resolution And Wide Range Temperature Detector Using 180-nm CMOS Process”, 2023 International Conference on IC Design and Technology (2023 ICICDT), Sep. 2023. DOI: 10.1109/ICICDT59917.2023.10332257 | MOST 110-2221-E-110-063-MY2 |
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| 313 | O. L. J. A. Jose, R.-M. Kuo, V. N. Kolakaluri, and C.-C. Wang, “SiC MOSFET high side gate driver design using HV CMOS process,” 2023 66th IEEE Midwest Symp. On Circuits and Systems (2023 MWSCAS), Aug. 2023. DOI: 10.1109/MWSCAS57524.2023.10406126 | NSTC 110- 2623- E-110 -001- |
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| 312 | V. N. Kolakaluri, O. L. J. A. Jose, and C.-C. Wang, “A 99.6 % duty cycle high-resolution DPWM using reconfiguring decoder,” 2023 66th IEEE Midwest Symp. On Circuits and Systems (2023 MWSCAS), Aug. 2023. DOI: 10.1109/MWSCAS57524.2023.10405918 | NSTC 110-2221-E-110-063-MY2 |
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| 311 | J. Akiri, V. N. Kolakaluri, K.-J. Yang, B. Esakki, P. Suresh, and C.-C. Wang, “Three-level DC-DC buck converter architecture using digital pulse width modulation,” 2023 IEEE Symp. On Industrial Electronics & Applications (2023 ISIEA), July 2023. DOI: 10.1109/ISIEA58478.2023.10212263 | MOST 109- 2221-E-032- |
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| 310 | V. N. Kolakaluri, O. L. J. A. Jose, and C.-C. Wang, “Matrix Phase Shift Based DPWM Technique To Achieve 90% Duty Cycle, “ 2023 IEEE International Symposium on Circuits and Systems (2023 ISCAS), May 2023.DOI: 10.1109/ISCAS46773.2023.10181491 | NSTC 110-2221-E-110-063 -MY2 |
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| 309 | C.-C. Wang, H.-C. Wu, and T.-H. Lin, “A 4-stage negative voltage charge pump with randomly selectable parallel switches,” 2022 IEEE 4th Inter. Conf. on Smart Power & Internet Energy Systems (SPIES 2022), pp. 1502-1505, Dec. 2022. | MOST 109-2221-E-032- 001-MY3 |
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| 308 | R. G. B. Sangalang, S.-H. Luo, H.-C. Wu, B.-Q. He, S.-F. Hsiao, C.-C. Wang, C. Jou, H. Hsia, and D. Yu, “A Power Effective DLA for PBs in Opto-Electrical Neural Network Architecture,” 2022 IEEE Asia Pacific Conference on Circuits and Systems (2022 APCCAS), pp. 46-49, Nov. 2022. | Download | |
| 307 | O. L. J. A. Jose, V. N. Kolakaluri, and C.-C. Wang, “A novel constant-pulse scheme for synchronous half-bridge converter module,” 2022 IEEE Asia Pacific Conference on Circuits and Systems (2022 APCCAS), pp. 299-303, Nov. 2022. | MOST 110-2623-E-110 -001- |
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| 306 | J. Akiri, L. K. S. Tolentino, L.-J. Yang, B. Esakki, S. Sampath, and C.-C. Wang, “A 500-MHz 32-bit DETFF-based shift register Utilizing 40-nm CMOS technology,” 2022 IEEE Asia Pacific Conference on Circuits and Systems (2022 APCCAS), pp. 251-255, Nov. 2022. | NSTC 110-2623-E-110-001- |
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| 305 | D. S. Kamarajugadda, O. L. J. A. Jose, L.-J. Yang, B. Esakki, S. Sampath, and C.-C. Wang, “A low-energy 8-bit CLA realized by single-phase ANT logic,” 2022 IEEE Inter. Conf. on IC Design and Technology (2022 ICICDT),pp. 28-31, Oct. 2022.( DOI: 10.1109/ICICDT56182.2022.9933106) | MOST 109-2221-E-032-001-MY3 |
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| 304 | T.-J. Lee, B.-H. Liao, and C.-C. Wang, “Wide lock-in range CDR with modified DQFD and coarse-fine tuning technique,” 2022 IEEE Inter. Conf. on IC Design and Technology (2022 ICICDT), (accepted, paper ID = 1570816708) pp. 61-64, Oct. 2022.( DOI: 10.1109/ICICDT56182.2022.9933101) | MOST 110-2224- E-110-004- |
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| 303 | S. Reddy, R. G. B. Sangalang, and C.-C. Wang, “Sub-0.2 pJ/Access Schmitt trigger based 1-kb 8T SRAM implemented using 40-nm CMOS process,” 2022 IEEE Inter. Conf. on IC Design and Technology (2022 ICICDT), (accepted, paper ID = 1570814864) pp. 24-27,Sep. 2022. (Best Paper Award)(DOI: 10.1109/ICICDT56182.2022.9933116) | MOST 110-2218-E-110-008- |
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| 302 | L. Lin, L. K. S. Tolentino, and C.-C. Wang, “A 40-nm CMOS wide input range and variable gain time-difference amplifier based on current source architecture,” 2022 IEEE International Symposium on Circuits and Systems (2022 ISCAS), (accepted), May 2022. (DOI: 10.1109/ISCAS48785.2022.9937655) | MOST 110-2224-E-110-004- |
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| 301 | C.-C. Wang, and C.-P. Kuo, “200-MHz single-ended 6T 1-kb SRAM with 0.2313 pJ energy/access using 40-nm CMOS logic process,” 2021 IEEE Inter. Symp. on Integrated Circuits and Systems (ISICAS), Dec. 2021, (DOI: 10.1109/TCSII.2021.3091973) | MOST 110-2218-E-110-008 |
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| 300 | P.-Y. Lou, Y.-Y. Ho and C.-C. Wang, “Analysis of Layout Arrangment for CMOS Oscillators to Reduce Overall Variation on Wafer,” 2021 International SoC Design Conference (2021 ISOCC), pp. 167-168, Oct. 2021. ( DOI: 10.1109/ISOCC53507.2021.9613955) | MOST 109-2224-E-110-001- |
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| 299 | P.-Y. Lou, Y.-X. Chen and C.-C. Wang, “On-chip CMOS Corner Detector Design for Panel Drivers,” 2021 International SoC Design Conference (2021 ISOCC), pp. 11-12, Oct. 2021.(Best Paper Award)( DOI: 10.1109/ISOCC53507.2021.9613965) | MOST 110-2218-E-110-008 |
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| 298 | C.-C. Wang, R. G. B. Sangalang, and I.-T. Tseng, “A Single-ended Low Power 16-nm FinFET 6T SRAM Design with PDP Reduction Circuit,” 2021 IEEE Asia Pacific Conf. on Circuits and Systems (2021 APCCAS), (accepted, paper ID = 36), Sep. 2021. (DOI: 10.1109/TCSII.2021.3123676) | Note : This paper is transferred to IEEE TCAS-II. | Download |
| 297 | T.-J. Lee, W.-S. Yang, and C.-C. Wang, “A 20 GHz 8-bit all-N-transistor logic CLA using 16-nm FinFET technology,” 2021 IEEE Asia Pacific Conf. on Circuits and Systems (2021 APCCAS), (DOI: 10.1109/APCCAS51387.2021.9687695), Nov. 2021. | MOST 109-2224- E-110-001- |
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| 296 | T.-J. Lee, W.-J. Su, L. K. S. Tolentino, and C.-C. Wang, “A 2.5-GHz 2×VDD 16-nm FinFET digital output buffer with slew rate and duty cycle self-adjustment,” 2021 IEEE Asia Pacific Conf. on Circuits and Systems (2021 APCCAS), (DOI: 10.1109/APCCAS51387.2021.9687736), Nov. 2021. | MOST 110-2218-E-110-008- |
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| 295 | C.-C. Wang, H.-C. Liu, U.-F. Chio, Y.-J. Hung, Y.-J. Chiu, “A 12-bit 100-Msps DAC with 75.3 dB SFDR using randomized biasing current source selection for real-time FOG systems,” 2021 IEEE 9th International Symposium on Next Generation Electronics (ISNE), pp. 1-4, July, 2021. (Invited Paper) (DOI: 10.1109/ISNE48910.2021.9493631) | MOST 108-2218-E-110-002- |
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| 294 | Y.-C. Chou, H.-H. Chen, C.-C. Wang, H.-M. Chou, and C.-C. Wang, “An AI AUV enabling vision-based diver-following and obstacle avoidance with 3D-modeling dataset,” 2021 3rd IEEE Inter. Conf. on Artificial Intelligence Circuits and Systems, (DOI: 10.1109/AICAS51828.2021.9458431), June, 2021. | MOST 109-2218-E-110-008 |
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| 293 | C.-C. Wang, C.-Y. Huang, and C.-Y. Yeh, "SRAM-based computation in memory architecture to realize single command of add-multiply operation and multifunction" 2021 IEEE International Symposium on Circuits and Systems (2021 ISCAS), (DOI: 10.1109/ISCAS51556.2021.9401561), May 2021. | MOST 108-2218-E-110-002 |
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| 292 | U. K. N. Ekkurthi, V. Dasari, J. Akiri, and C.-C. Wang, "A 100 MHz 9.14-mW 8-bit shift register using double edge triggered flip-flop," 2021 IEEE International Symposium on Circuits and Systems (2021 ISCAS), (DOI: 10.1109/ISCAS51556.2021.9401379), May 2021. | Download | |
| 291 | C.-C. Wang, and C.-P. Kuo, "67.5-fJ per access 1-Kb SRAM using 40-nm logic CMOS process," 2021 IEEE International Symposium on Circuits and Systems (2021 ISCAS), (DOI: 10.1109/ISCAS51556.2021.9401099), May 2021. | MOST 107-2218-E-110-002 |
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| 290 | T.-J. Lee, M.-J. Wu, and C.-C. Wang, “A 10-bit 50-MS/s SAR ADC with split-capacitor array using unity-gain amplifiers applied in FOG systems,” 2021 IEEE 4th International Conference on Electronics Technology (2021 ICET), pp. 356-359, May 2021. | MOST 109-2224-E-110-001- |
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| 289 | A. Avilala, S. Reddy, D. S. Kamarajugadda, S. Sampath, P. Suresh, and C.-C. Wang, “High resolution time-to-digital converter design with anti-PVT-variation mechanism,” 2021 IEEE 4th International Conference on Electronics Technology (2021 ICET), pp. 452-255, May 2021. | Download | |
| 288 | P.-Y. Lou, C.-C.-H. H,, and C.-C. Wang, “A PFM-controlled LED driver to achieve consistent illuminance,” 2021 IEEE 4th International Conference on Electronics Technology (2021 ICET) , pp. 942-945, May 2021. | MOST 109-2224-E-110-001 |
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| 287 | C.-C. Wang, and S.-W. Lu, “100 MHz random number generator Design using interleaved metastable NAND/NOR latches,” 2020 IEEE Asia Pacific Conference on Circuits and Systems (2020 APCCAS), pp. 98-101, Dec. 2020. | MOST 108-2218-E-110-002 |
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| 286 | C.-C. Wang, C.-Y. Huang, C.-H. Lin, C.-H. Yeh, G.-X. Liu, and Y.-C. Chou, “3D-modeling dataset augmentation for underwater AUV real-time manipulations,” 2020 IEEE Asia Pacific Conference on Circuits and Systems (2020 APCCAS), pp. 145-148, Dec. 2020. | MOST 108-2218-E-110-002 |
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| 285 | C.-C. Wang, P.-Y. Lou, Z.-Y. Hou, H.-C. Tsai, Y.-J. Chiu, and Y.-C. Lin, “High voltage CMOS bidirectional current sensor for battery Monitoring in portable devices,” 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (2020ICSICT), pp. 1-4, Nov. 2020. | MOST 108-2218-E-110-011 |
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| 284 | T.-J. Lee, C.-K. Wang, and C.-C. Wang, “4.15 W SIDO buck converter with low cross regulation using adaptive PCCM control,” 2020 IEEE 2nd Inter. Conf. on Smart Power & Internet Energy Systems (2020 SPIES), pp. 442-445, Sep. 2020. | MOST 108-2218-E-110-002- |
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| 283 | C.-C. Wang, P.-C. Chen, Y.-H. Hsueh, C.-T. Pan, C.-K. Yen, T.-J. Lee., and J. R. Hizon, “A PVDF-film energy harvesting circuit design using CMOS process,” 2020 IEEE 2nd Inter. Conf. on Smart Power & Internet Energy Systems (2020 SPIES), pp. 55-58, Sep. 2020. | MOST 108-2218-E-110-002- |
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| 282 | T.-J. Lee, P.-K. Su, and C.-C Wang, “20V HV energy harvesting circuit with ACC/CV mode and MPPT control for a 5 W solar panel,” 2020 IEEE 2nd Inter. Conf. on Smart Power & Internet Energy Systems (2020 SPIES), pp. 205-208, Sep. 2020. | MOST 108-2218-E-110-002- |
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| 281 | C.-T. Chen, T.-Y. Tsai, Y.-J. Chiu, and C.-C. Wang, “Sampling Rate Enhancement for SAR-ADCs Using Adaptive Reset Approach for FOG Systems,” 2019 IEEE 13th International Conference on ASIC (ASICON 2019), pp. 1-4, (invited paper), Oct. 2019. | MOST 108-2218-E-110-002- |
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| 280 | C.-C. Wang, and S.-W. Liu, “2.5 GHz data rate 2xVDD digital output buffer design realized by 16-nm FinFET CMOS,” 2019 The 8th IEEE International Symposium on Next-Generation Electronics (ISNE 2019), pp. 1-4, (invited paper), Oct. 2019. | MOST 108-2218-E-110-002- |
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| 279 | Y.-C. Chou, H.-H. Chen, C.-C. Wang, Y.-H. Lin, B.-S. Huang, C.-C. Wang, “Small RV-based deep-towed seafloor sampling systems,” 2019 IEEE OCEANS, pp. 1-5, June 2019. (DOI: 10.1109/OCEANSE.2019.8867194) | Download | |
| 278 | N. Sulistiyanto, C.-C. Wang, and. R. Rieger, “A low frequency OTA design with temperature-insensitive variable transconductance using 180-nm CMOS technology” 2019 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2019), pp. 168-171, June 2019. | MOST 107-2218-E-110-004- |
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| 277 | C.-C. Wang, and I.-T. Tseng, “Ultra low power single-ended 6T SRAM using 40 nm CMOS technology,”2019 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2019), pp. 149-152, June 2019. | MOST 107-2218-E-110-004- |
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| 276 | T.-Y. Tsai, T.-S. Wang, Y.-J. Chiu, and C.-C. Wang, “A PVT validation phase-lock loop with multi-band VCO applied in closed-loop FOGs,”2019 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2019), pp. 126-129, June 2019. | MOST 107-2218-E-110-004- |
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| 275 | C.-C. Wang, and G.-X. Liu, “A 1.5A 88.6% Li-ion battery charger design using pulse swallow technique in light load,” 2019 Inter. Symp. on Circuits and Systems (ISCAS), pp. 1-4, May 2019. | MOST 107-2218-E-110-004- |
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| 274 | T.-J. Lee. C.-H. Hsu, and C.-C. Wang, “High efficiency buck converter with wide load current range using dual-mode of PWM and PSM,” 2019 Inter. Symp. on Circuits and Systems (ISCAS), pp. 1-4, May 2019. | MOST 107-2218-E-110-004- |
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| 273 | T.-Y. Tsai, Y.-H. Chen, and C.-C. Wang, “Multifunctional in-memory computation architecture using single-ended disturb-free 6T SRAM,” 2019 Inter. Conf. on Computer Science, Electrical and Electronic Engineering (ICCEE), (accepted, paper ID = 194411), Feb. 2019. | MOST 107-2218-E-110-004- |
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| 272 | M. Rif’an, R. Rieger, and C.-C. Wang, “Accurate RR-interval detection with daubechies filtering and adaptive thresholding,” 2019 Inter. Conf. on Computer Science, Electrical and Electronic Engineering (ICCEE), (accepted, paper ID = 194411), Feb. 2019. | MOST 106-2221-E-110-058- |
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| 271 | P.-Y. Lou, K.-Y. Chao, and C.-C. Wang, “A robust time-to-digital converter design with high precision for underwater vehicle system clock synchronization and sensing,” 2019 IEEE Underwater Technology (UT), DOI: 10.1109/UT.2019.8734337 , Apr. 2019. | MOST 105-2218-E-110-006- |
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| 270 | P.-Y. Lou, C.-H. Chu, and C.-C. Wang, “A broken line detection circuit for multi-cell Li-ion battery module,” 2019 IEEE Inter. Conf. on Consumer Electronics (ICCE), pp. 1-2, Jan. 2019. | MOST 107-2218-E-110-004- |
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| 269 | M. Rif’an, R. Rieger, and C.-C. Wang, “Accurate RR-Interval acquisition with stationary wavelet transform and adaptive thresholding,” 2018 2nd Asia Conference on Machine Learning and Computing (ACMLC), pp. 38-39, Dec. 2018. | Download | |
| 268 | C.-C. Wang, and H.-Y. Shih, “High SFDR pipeline ROM-less DDFS design on FPGA platform using parabolic equations,” 2018 IEEE 14th Inter. Conf. on Solid-state and Integrated Circuit Technology (ICSICT), S47-1 (CD-ROM), (invited paper), Oct. 2018. | Download | |
| 267 | C.-C. Wang, Z.-Y. Hou, and S.-W. Huang, “40-nm 2xVDD Digital Output Buffer Design With DDR4-Compliant Slew Rate,” 2018 IEEE Asia Pacific Conf. on Circuits and Systems(APCCAS), pp. 279-282, Oct. 2018. | Download | |
| 266 | C.-C. Wang, and H.-Y. Shih, “Switching activity analysis of shifters and multipliers for application to ROM-less DDFS architecture selection for low power performance,” 2018 Electrical Power, Electronics, Communications, Controls and Informatics Seminar (EECCIS), pp. 127-130, (Best Paper Award), Oct. 2018. | Download | |
| 265 | A. Baskoro, O. Setyawati, P. Siwindarto, and C.-C. Wang, “Low-power high-speed 8-bit shift register using double-edge triggered flip-flops,” 2018 Inter. Conf. on Electrical Engineering and Informatics (ICEEI 2018), pp. 46, paper ID = I005, June 2018. | Download | |
| 264 | C.-C. Wang, and C.-J. Hsu, “An on-chip PWM-based DC-DC buck converter design with high-efficiency light load mode operation,” 2018 Inter. Conf. on Electrical Engineering and Informatics (ICEEI 2018), pp. 46, paper ID = I004, June 2018. | MOST106-2221-E-110-065- |
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| 263 | G.-R. Chen, T.-Y. Tsai, and C.-C. Wang, “Impedance calculation read-out system for biomedical sensors,” 2018 Inter. Conf. on Electrical Engineering and Informatics (ICEEI 2018), pp. 46, paper ID = I002, June 2018. | Download | |
| 262 | H.-C. Huang, D.-S. Wang, and C.-C. Wang, “A frequency-shift readout system with offset cancellation OPA for portable devices of marijuana detection,” 2018 IEEE Inter. Conf. on Consumer Electronics (2018 ICCE), (accepted, paper ID = #1570378489), Jan. 2018. | Download | |
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| 261 | W. Wang, Y.-Y. Xu, and C.-C. Wang, “Dynamic power estimation for ROM-less DDFS designs using switching Activity analysis,” 2017 14th International SoC Design Conference (ISOCC 2017), pp. 280-281, Nov. 2017. | Download | |
| 260 | T.-Y. Tsai, H.-Y. Shih, and C.-C. Wang, “A pipeline ROM-less DDFS using equal-division interpolation,” 2017 14th International SoC Design Conference (ISOCC 2017), pp.19-20, Nov. 2017. | MOST 104-2622-E-006-040-CC2 |
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| 259 | Z.-Y. Hou, H.-C. Tsai, and C.-C. Wang, “High-voltage bidirectional current sensor,” 2017 IEEE 12th International Conference on ASIC (ASICON 2017), pp. 1163-1164, Aug. 2017. | MOST104-2622 -E-006-040-CC2 |
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| 258 | C.-C. Wang, T.-Y. Tsai, Y.-L. Deng, and T.-J. Lee, “2×VDD 28-nm CMOS digital output buffer using low-Vth transistors for slew rate adjustment,” 2017 IEEE The 7th international conference on Integrated Circuit, Design, and Verification (ICDV 2017), pp. 22-27, Oct. 2017. (Best Paper Award) | MOST 104- 2622-E-006-040-CC2 |
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| 257 | Z.-Y. Hou, J.-C. You, and C.-C. Wang, “A temperature to frequency converter with linearity calibration,” 2017 IEEE Taiwan and Japan Conference on Circuits and Systems (TJCAS 2017), pp. 54, Aug. 2017. | MOST 105-2221-E-110-058- |
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| 256 | C.-C. Cheng, C.-H. Lin, Y.-J. Wang, and C.-C. Wang, “Design of a multidisciplinary project-oriented capstone course for mechanical engineering education,” 2017 Inter. Conf. on Higher Education, 19(8), pp. 1810-1814, Aug. 2017. (Copenhagen, Denmark) | MOST 103-2511-S-110-010-MY3 |
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| 255 | C.-C. Wang, P.-Y. Lou, T.-Y. Tsai, Y.-L. Deng, and T.-J. Lee, “2xVDD digital output buffer insensitive to process and voltage variations,” 2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (2017 PrimeAsia), (accepted, paper ID = #1570378683) Aug. 2017 | MOST 105-2218-E-110-006 |
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| 254 | Z.-Y. Hou, Z.-Y. Ho, J.-C. You, and C.-C. Wang, “A primary-side output current estimator with process compensator for flyback LED drivers,” 2017 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2017), pp. 28-31, May 2017. | MOST104-2622-E-006-040-CC2 |
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| 253 | Z.-Y. Hou, P.-Y. Lou, and C.-C. Wang, “State of charge, state of health, and state of function monitoring for EV BMS,” 2017 IEEE Inter. Conf. on Consumer Electronics, pp. 329-330, Jan. 2017. | NSC102-2221-E-110-081-MY3 |
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| 252 | D.-S. Wang, Y.-S. Liu, and C.-C. Wang, “A novel frequency-shift readout system for CEA concentration detection application,” 2016 The 13th Inter. SOC Design Conf., pp. 133-134, Oct. 2016. | NSC 104-2622-E-006-040-CC2 |
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| 251 | C.-C. Wang, and C.-L. Hsieh, “Disturb-free 5T loadless SRAM cell design with multi-Vth transistors using 28 nm CMOS process,” 2016 The 13th Inter. SOC Design Conf., pp. 103-104, Oct. 2016. | MOST 104-2622-E-006-040-CC2 |
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| 250 | C.-C. Cheng, C.-C. Wang, Y.-J. Wang, Y.-Y. Cheng, C.-C. Wang, “A Project-oriented Capstone Course for Creative Engineering Education,” 2016 ASEE Annual Conference & Exposition, Paper ID #15540, June, 2016. | Download | |
| 249 | T.-Y. Tsai, Y.-Y. Chou, and C.-C. Wang, “A method of leakage reduction and slew-rate adjustment in 2 x VDD output buffer For 28 nm CMOS technology and above,” 2016 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2016), CD-ROM version, paper ID = 22, pp. 1-4, June 2016. | NSC 102-2221-E-110-083-MY3 |
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| 248 | Z.-Y. Hou, T.-W. Huang, and C.-C. Wang, “On-chip accurate primary-side output current estimator for flyback LED driver control,” 2016 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT 2016), CD-ROM version, paper ID = 6, pp. 1-4, June 2016. | NSC 102-2221-E-110-081-MY3 |
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| 247 | T.-Y. Tsai, Y.-L. Teng, and C.-C. Wang, “A nano-scale 2xVDD I/O buffer with encoded PV compensation technique,” 2016 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2016), pp. 598-601, May 2016. | NSC 102-2221-E-110-083-MY3 |
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| 246 | Y.-T. Tu, D.-S. Wang, and C.-C. Wang, “An accurate phase shift detector using bulk voltage boosting technique for sensing applications,” 2016 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2016), pp. 2110 – 2113, May 2016 | MOST 102-2221-E-110-083-MY3 |
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| 245 | C.-C. Wang, Y.-Y. Cheng, J.-C. Chiu, C.-K. Wen, Y.-C. Lin, J.-C. Lou, C.-P. Yu, Y.-J. Chen, Y.-J. Wang, C.-C. Cheng, K.-S. Chen, H.-W. Chang, and C.- C. Wang, “An experimental study of innovations in engineering curriculum and modularized technology special topics,” 2105 The 31st Annual International Conference of Association of Science Education, (accepted), 2015. | Download | |
| 244 | C.-C. Wang, Z.-Y. Hou, and T.-W. Huang, “A flyback driver with adaptive switching frequency control for smart lighting,” 2016 IEEE Inter. Conf. on Consumer Electronics, pp. 115-116, Jan. 2016. | NSC102-2221-E-110-081-MY3 |
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| 243 | C.-C. Wang, and M.-Y. Tseng, “10 Mbps high-voltage digital transciever on single die for 50 V voltage swing,” 2015 IEEE The 11th Inter. Conf. on ASIC (2105 ASICON), pp. 32, USB version, Nov. 2015. (invited paper) | Download | |
| 242 | W.-J. Lu, S.-S. Wang, M.-Y. Tseng, and C.-C. Wang, “A capacity monitoring system with HV current sensor and calibrated current estimation approach,” 2015 IEEE TENCON, pp. 92, USB version, Nov. 2015. (invited paper) | Download | |
| 241 | C.-C. Wang, Z.-Y. Hou, W.-J. Lu, and S.-S. Wang, “High-voltage sense stage on silicon,” 2015 Taiwan and Japan Conference on Circuits and Systems, pp. 14, Aug. 2015. | Download | |
| 240 | C.-C. Wang, D.-S. Wang, S.-Y. Chen, and C.-M. Chang, “A wide range and high conversion gain power detector for frequency shift sensing applications,” 2015 58th IEEE Midwest Symp. On Circuits and Systems, pp. 153-156, Aug. 2015. | NSC 102-2221-E-110-081-MY3 |
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| 239 | C.-C. Wang, T.-Y. Tsai, and W. Lin, “A high-speed 2 x VDD output buffer with PVTL detection using 40-nm CMOS technology, “ 2015 IEEE Inter. Conf. on IC Design and Technology, CD-ROM version, pp. 1-4, June 2015. | NSC 102-2221-E-110-083-MY3 |
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| 238 | C.-C. Wang, D.-S. Wang, S.-Y. Chen, and C.-M. Chang, “A Wide Range Power Detector for Biosensing Systems Using Frequency Shift Schemes,” 2015 Symp. On Electronics, Medicine, Biology Applications (SEMBA 2015), CD-ROM, S0015, Jan. 2015. | NSC 102-3113-P-110- 010 |
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| 237 | C.-L. Chen, D.-S. Wang, J.-J. Li, and C.-C. Wang, “A high-voltage transceiver for electrical vehicle battery management systems,” 2015 IEEE Inter. Conf. on Consumer Electronics (ICCE 2015), pp. 295-296, Jan. 2015 | NSC 102-2221-E-110-081-MY3 |
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| 236 | C.-L. Chen, Y.-H. Su, and C.-C. Wang, “Low power cross-domain high-voltage transmitters for battery management systems,” 2008 IEEE Inter. SoC Design Conference (ISOCC 2014), pp. 36-37, Nov. 2014. (invited paper) | NSC102-2221-E-110-081-MY3 |
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| 235 | C.-C. Wang, D.-S. Wang, S.-Y. Chen, and C.-M. Chang, "A 20 GHz power detector with 176 mV/dB conversion gain," 2014 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2014), pp. 551-554, Nov. 2014. | NSC 102-3113-P-110-101 |
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| 234 | C.-C. Wang, W.-J. Lu, and M.-Y. Tseng, "Slew Rate Improved 2×VDD Output Buffer Using Leakage and Delay Compensation," 2014 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2014), pp. 563-566, Nov. 2014. | NSC 102-3113-P-110-010 |
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| 233 | C.-C. Wang, C.-H. Liao, C.-M. Chang, J.-W. Lan, and I.-Y. Huang, “A Fast CEA Analyzer Prototype for Point of Care Testing,” 2014 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2014), paper ID P26, June 2014. | NSC 99-2221-E-110-081-MY3 |
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| 232 | T.-J. Lee, W. Lin, and C.-C. Wang, “Slew rate improved 2×VDD output buffer using leakage and delay compensation,” 2014 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2014), paper ID W1-1, June 2014. (invited paper) | NSC102-2221-E-110-083-MY3 |
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| 231 | C.-C. Wang, C.-H. Liao, and S.-Y. Chen, “A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process,” 2014 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2014), pp. 1126-1129, June 2014. | MOEA102-EC-17-A-01-01-1010 |
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| 230 | C.-C. Wang, W.-J. Lu, and T.-C. Wu, “A CMOS wide-range temperature sensor with process compensation and second-order calibration for battery management systems,” 2014 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2014), pp. 586-589, June 2014. | MOEA 102-EC-17-A-01-01-1010 |
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| 229 | C.-C. Wang, Z.-Y. Hou, and C.-L. Chen, “Bus driver controller with hazard detection for FlexRay protocol 3.0.1,” 2014 The 5th International Conference on Intelligent and Advanced Systems (ICIAS2014), CD-ROM, paper ID = 1569870979, June 2014. | NSC 99-2221-E-110-081-MY3 |
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| 228 | C.-C. Wang, W.-J. Lu, S.-S. Wang, “An on-chip high-voltage current sensor for battery module monitoring, ” 2014 IEEE Inter. Conf. on IC Design and Technology (2013 ICICDT), CD-ROM, ID08, May, 2014. | MOEA 102-EC-17-A-01-01-1010 |
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| 227 | T.-J. Lee, K.-W. Ruan, C.-C. Wang, “32% slew rate and 27% data rate improved 2×VDD output buffer Using PVTL compensation,” 2014 IEEE Inter. Conf. on IC Design and Technology (2013 ICICDT), CD-ROM, ID33, May, 2014. | NSC102-2221-E-110-083-MY3 |
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| 226 | C.-C. Wang, T.-C. Song, T.-Y. Yang, and Y.-J. Hsieh, “A 50-MHz clock generator with voltage and temperature compensation using low dropout regulator,” 2013 Inter. SoC Design Conference (ISOCC 2013), pp. 99-102, Nov. 2013. | NSC99-2221-E-110-082-MY3 |
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| 225 | C.-C. Wang, W.-J. Lu, T.-Y. Tsai, T.-C. Wu, and C.-Y. Juan, “A temperature detector with process compensation and non-linear calibration for battery management systems with HV ESD protection,” 2013 Inter. SoC Design Conference (ISOCC 2013), pp. 95-98, Nov. 2013. | MOEA 102-EC-17-A-01-01-1010 |
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| 224 | C.-C. Wang, T.-C. Song, C.-H. Liao, C.-M. Chang, J.-W. Lan, and I.-Y. Huang, “A CEA concentration measurement system using FPW biosensors and frequency-shift readout IC,” 2013 Inter. SoC Design Conference (ISOCC 2013), pp. 27-30, Nov. 2013. | NSC99-2221-E-110-082-MY3 |
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| 223 | T.-J. Lee, C.-M. Chang, T.-C. Sung, and C.-C, Wang, “A 10-bit 400-MS/s current-steering DAC with process calibration,” 2013 IEEE Inter. Conf. on Circuits and Systems (2013 ICCAS), pp. 28-31, Sep. 2013. | NSC99-2221-E-110-082-MY3 |
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| 222 | C.-L. Chen, Y.-L. Wu, C.-Y. Juan,, and C.-C. Wang, “High voltage operational amplifier and high voltage transceiver using 0.25 um 60V BCD process for battery management systems,” 2013 IEEE Inter. Conf. on IC Design and Technology (2013 ICICDT), pp. 97-100, May 2013 | NSC 99-2221-E-110-082-MY3 |
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| 221 | C.-C. Wang, W.-J. Lu, and H.-Y. Tseng, "A high-speed 2xVDD output buffer with PVT detection using 40-nm CMOS technology", 2013 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2012), pp. 2079-2082, May 2013 | Download | |
| 220 | C.-C. Wang, C.-L. Chen, Z.-Y. Hou, and S.-C. Lin, “A delay-based transceiver with over-current protection for ECU nodes in automobile FlexRay systems,” 2013 IEEE Inter. Conf. on Consumer Electronics (ICCE), pp. 610-611, Jan. 2013. | NSC99-2221-E-110-082-MY3 |
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| 219 | T.-J. Lee, W.-J. Lu, W.-C. Hsiao, and C.-C. Wang, “ Linear programmable gain amplifier using reconfiguration local-feedback transconductors,” 2012 IEEE Asia Pacific Conference on Circuits and System (APCCAS), pp.228-231, Dec. 2012. | Download | |
| 218 | C.-C. Wang, C.-L. Chen, Z.-Y. Hou, and S.-C. Lin, “A delay-based transceiver with over-current protection for ECU nodes in automobile FlexRay systems,” 2013 IEEE Inter. Conf. on Consumer Electronics, pp. 300-303, Dec. 2012. | NSC99-2221-E-110-082-MY3 |
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| 217 | C.-C. Chen, D.-S. Wang, J.-J. Li, and C.-C. Wang, “A battery interconnect module with high voltage transceiver using 0.25 um 60V BCD process for battery management systems,” 2012 International SoC Design Conference (ISOCC), pp. 1-4, Nov. 2012. | MOEA 100-EC-17-A-01-1010 |
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| 216 | C.-L. Chen, H.-Y. Tseng, R.-C. Kuo, and C.-C. Wang, “On-chip MOS PVT variation monitor for slew rate self-adjusting 2×VDD output buffers,” 2012 Inter. Conf. on IC Design and Technology (2012 ICICDT), paper ID : J1, CD-ROM, May, 2012. (invited paper) | MOEA101-EC-17-A-01-1010 |
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| 215 | T.-J. Lee, D. Shmilovitz, Y.-J. Hsieh, C.-C. Wang, “Temperature and process compensated clock generator using feedback TPC Bias,” 2012 Inter. Conf. on IC Design and Technology (2012 ICICDT), paper ID : G2. CD-ROM, May, 2012. (invited paper) | NSC 99-2221-E-110-081-MY3 |
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| 214 | C.-L. Chen, Y. Hu, W. Luo, C.-C. Wang, and C.-Y. Juan, “A high voltage analog multiplexer with digital calibration for battery management systems,” 2012 Inter. Conf. on IC Design and Technology (2012 ICICDT), paper ID : K2, CD-ROM, May, 2012. | NSC 99-2221-E-110-081-MY3 |
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| 213 | S.-Y. Chen, and C.-C. Wang, “Single-ended disturb-free 5T loadless SRAM cell using 90 nm CMOS process,” 2012 Inter. Conf. on IC Design and Technology (2012 ICICDT), paper ID : C6, CD-ROM, May, 2012. | NSC 99-2221-E-110-081-MY3 |
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| 212 | C.-C. Wang, C.-H. Hsu, Y.-D. Tsai, Y.-C. Chen, M.-C. Lee, and I.-Y. Huang, “A fast FPW-based protein concentration measurement system,” 2012 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2012), pp. 2389-2392, May 2012. | NSC 99-2221-E-110-081-MY3 |
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| 211 | C.-L. Chen, S.-C. Lin, C.-C. Wang and C.-Y. Juan, "A digital over-temperature protector for FlexRay systems," 2012 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2012), pp. 1991-1994, May. 2012. | NSC99-2221-E-110-082-MY3 |
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| 210 | S.-H. Yang, and C.-C. Wang, "Feed-forward output swing prediction AGC with parallel-detect singular-store peak detector," 2012 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2012), pp. 2965-2968, May 2012. | NSC99-2221-E-110-082-MY3 |
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| 209 | C.-L. Chen, H.-Y. Tseng, R.-C. Kuo, C.-C. Wang, “A slew rate self-adjusting 2×VDD output buffer with PVT compensation,” 2012 Inter. Symp. on VLSI Design, Automation and Test (VLSI-DAT), pp. 58, Apr. 2012 | MOEA 100-EC-17-A-01-1010 |
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| 208 | G.-N. Sung, C.-M. Huang, and C.-C. Wang, “A PLC transceiver design of in-vehicle power line in FlexRay-based automotive communication systems,” 2012 IEEE Inter. Conf. on Consumer Electronics (ICCE 2012), pp. 313-314, Jan. 2012. | Download | |
| 207 | C.-H. Hsu, Y.-D. Tsai, Y.-C. Chen, M.-C. Lee, I.-Y. Huang, and C.-C. Wang, “A fast FPW allergy analyzer prototype for point of care (POC),” 2012 IEEE Inter. Conf. on Consumer Electronics (ICCE 2012), pp. 544-545, Jan. 2012. | NSC 99-2221-E-110-081-MY3 |
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| 206 | C.-C. Wang, C.-L. Chen, J.-J. Li, and C.-Y. Juan, “Configurable active star Design for automobile FlexRay systems,” 2012 IEEE Inter. Conf. on Consumer Electronics (ICCE 2012), pp. 305-306, Jan. 2012. | NSC 99-2221-E-110-082-MY3 |
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| 205 | C.-H. Hsu, Y.-C. Chen, and C.-C. Wang, “ROM-less DDFS using non-equal division parabolic polynomial interpolation method,” 2011 Inter. Symp. on Integrated Circuits 2011 (ISIC 2011), pp. 63-66, Dec. 2011. | NSC 99-2221-E-110-081-MY3 |
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| 204 | C.-L. Chen, and C.-C. Wang, “A fast-locking clock and data recovery circuit with a lock detector loop,” 2011 Inter. Symp. on Integrated Circuits 2011 (ISIC 2011), pp. 342-345, Dec. 2011. | NSC 99-2221-E-110-081-MY3 |
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| 203 | T.-J. Lee, W.-C. Hsiao, and C.-C. Wang, “20 MHz accurate peak detector for FPW allergy biosensor with digital calibration,” 2011 Inter. Symp. on Integrated Circuits 2011 (ISIC 2011), pp. 486-489, Dec. 2011. | NSC99 2923-E-110-002-MY2 |
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| 202 | T.-J. Lee, W. Lou, S.-H. Yang, M.-H. Shih, K.-C. Kuo, and C.-C. Wang, “2.45 GHz ZigBee receiver frontend for HAN with smart meter,” 2011 Inter. Symp. on Integrated Circuits 2011 (ISIC 2011), pp. 490-493, Dec. Sep. 2011. | NSC 99-2220-E-110-001 |
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| 201 | S.-H. Wang, and C.-C. Wang, “A 48-dB dynamic gain range/stage linear-in-dB low power variable gain amplifier for direct-conversion receivers,” 2011 Inter. SoC Conf. (2011 ISOCC), CD-ROM version, Nov. 2011. | MOEA 99-EC-17-A-01-S1-104 |
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| 200 | R.-C. Kuo, H.-Y. Tseng, J.-W. Liu, and C.-C. Wang, “On-chip process and temperature compensation and self-adjusting slew rate control for output buffer,” 2011 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (2011 PrimeAsia), (accepted, paper no. 1044), Aug. 2011. | MOEA 99-EC-17-A-01-S1-104 |
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| 199 | C.-H. Hsu, S.-B. Tseng, Y.-J. Hsieh, and C.-C. Wang, “One-time Implantable SCS System,” The 5th International Conference on Bioinformatics and Biomedical Engineering (iCBBE 2011), pp. 1-4, May 2011. | NSC99-2221-E-110-081-MY3 |
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| 198 | S.-H. Yang, and C.-C. Wang, “Domestic indirect feedback compensation of multiple-stage amplifiers for multiple-voltage level-converting amplification,” 2011 Inter. Conf. on IC Design and Technology (2011 ICICDT), pp. 1-4, May 2011. | NSC 99-2221-E-110-082-MY3 |
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| 197 | C.-H. Hsu, Y.-R. Lin, Y.-D. Tsai, Y.-C. Chen, and C.-C. Wang, “A frequency-shift readout system for FPW allergy biosensor,” 2011 Inter. Conf. on IC Design and Technology (2011 ICICDT), pp. 1-4, May 2011. | NSC 99-2221-E-110-081-MY3 |
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| 196 | C.-C. Wang, C.-L. Chen, T.-H. Yeh, Y. Hu, and G.-N. Sung, "A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems,'' 2011 IEEE Inter. Symp. on Circuits and Systems (ISCAS'2011), pp. 434-437, May 2011. | NSC99-2221-E-110-083-MY3 |
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| 195 | S.-H. Yang, J.-W. Liu, Y.-H. Wu, D.-S. Wang, and C.-C. Wang, "A high voltage battery charger with smooth charge mode transition in BCD process,'' 2011 IEEE Inter. Symp. on Circuits and Systems (ISCAS'2011), pp. 813-816, May 2011. | NSC98-2220-E-110-009 |
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| 194 | Y.-R Lin, C.-H. Hsu, R. Rieger, and C.-C. Wang, “Low power RC5 cipher for ZigBee portable biomedical systems,” 2011 Inter. Conf. on Consumer Electronics, pp. 625-626, Jan. 2011. | NSC96-2628-E-110-019-MY3 |
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| 193 | C.-C. Wang, C.-L. Lin, J.-J. Li, and G.-N. Sung, “A low power wake up detector for ECU nodes in an automobile FlexRay system,” 2011 Inter. Conf. on Consumer Electronics, pp. 525-526, Jan. 2011. | NSC99-2221-E-110-082-MY3 |
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| 192 | R.-C. Kuo, H.-H. Hou, and C.-C. Wang, “A PCI166-compatible 3xVDD-tolerant mixed-voltage I/O buffer,” 2010 IEEE Asia Pacific Cond. on Circuits and Systems, pp. 320-323, Dec. 2010. | NSC98-2220-E-110-009 |
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| 191 | R.-C. Kuo, T.-H. Tsai, Y.-J. Hsieh, and C.-C. Wang, “A high precision low dropout regulator with nested feedback loops,” 2010 IEEE Asia Pacific Cond. on Circuits and Systems, pp. 664-667, Dec. 2010. | NSC98-2220-E-110-009 |
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| 190 | C.-Y. Li, C.-C. Wang, and R. Rieger, “On the capacitively coupled transmission channel for body area network application,” 2010 IEEE Inter. Symp. on Next-Generation Electronics (2010 ISNE), pp. 5-8, Nov. 2010 | Download | |
| 189 | G.-N. Sung, C.-L. Wang, P.-C. Jui, and C.-C. Wang, "A high-efficiency DC-DC buck converter for sub-3xVDD power supply,'' 2010 IEEE Inter. Conf. on IC Design and Technology (ICICDT'2010), pp. 164-167, June 2010. | NSC96-2628-E-110-018-MY3 |
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| 188 | C.-C. Wang, R.-C. Kuo, and J.-W. Liu, “450 MHz 1.0 V to 1.8 V bidirectional mixed-voltage I/O buffer using 90-nm process,” 2010 IEEE Inter. Conf. on IC Design and Technology, pp. 55-58, June 2010. | MOEA 97-EC-17-A-01-S1-104 | Download |
| 187 | C.-C. Wang, S.-C. Liao, and Y.-C. Liu, "A 125-MHz wide-Range mixed-voltage I/O buffer using gated floating N-well circuit,'' 2010 IEEE Inter. Symp. on Circuits and Systems (ISCAS'2010), pp. 3421-3424, May 2010. | NSC96-2928-E-110-019-MY3 |
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| 186 | C.-C. Wang, C.-C. Huang, Y.-C. Liu, V. Pikov, and D. Shmilovitz, "A mini-invasive multi-function biomedical pressure measurement system ASIC,'' 2010 IEEE Inter. Symp. on Circuits and Systems (ISCAS'2010), pp. 2936-2939, May 2010. | NSC96-2923-E-110-001-MY2 |
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| 185 | C.-C. Wang, C.-H. Hsu, S.-B. Tseng, and D. Shmilovitz, “A one-time implantable wireless power bidirectional transmission spinal cord stimulation system,” 2010 Inter. Symp. on VLSI Design, Automation and Test, pp. 288-291, Apr. 2010. | NSC96-2923-E-110-001-MY2 |
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| 184 | C.-C. Wang, C.-Y. Yang, and C.-C. Huang, "Personal gateway design for portable medical devices used in body area networks,'' 2010 IEEE Inter. Conf. on Consumer Electronics (ICCE'2010), paper no. P2-9, pp. 189-190, Jan. 2010. | NSC96-2923-E-110-002-MY2 |
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| 183 | G.-N. Sung, Y.-C. Lu, and C.-C. Wang, "A power-aware signed 2-dimensional bypassing multiplier for video/image processing,'' 2010 IEEE Inter. Conf. on Consumer Electronics (ICCE'2010), paper no. 11.2-4, pp. 511-512, Jan. 2010. | NSC96-2628-E-110-018-MY3 |
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| 182 | C.-C. Wang, J.-W. Liu, R.-C. Kuo, K. S.-M. Li, and S.-J. Wang, "A 1.8 V to 3.3 V level-converting flip-flop design for multiple power supply systems,'' 2009 12th Inter. Symp. on Integrated Circuits (ISIC-2009), pp. 61-64, Dec. 2009. | MOEA 97-EC-17-A-01-S1-104 |
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| 181 | C.-H. Hsu, C.-C. Huang, K.-S. Lim, W.-C. Hsiao, and C.-C. Wang, "A high performance current-balancing instrumentation amplifier for ECG monitoring systems,'' 2009 Inter. SOC Conf. (ISOCC'2009),” pp. 83-86, Nov. 2009. | NSC96-2628-E-110-019-MY3 |
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| 180 | C.-C. Wang, C.-H. Hsu, and Y.-C. Liu, “A 1/2 x VDD to 3 x VDD bidirectional I/O buffer using 0.18-um 1.8-V CMOS technology,” 2009 The 20th VLSI Design/CAD Symposium, CR-ROM, no. 9-1, pp.70, Aug. 2009 | MOEA 97-EC-17-A-01-S1-104 |
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| 179 | S. Ozeri, D. Shmilovitz, and C.-C. Wang, “A drive circuit for piezoelectric devices with low harmonics content,” 2009 IEEE Inter. Symp. on Circuits & Systems (ISCAS’2009), pp. 1093-1096, May 2009 | NSC96-2923-E-110-002-MY2 |
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| 178 | C.-H. Hsu, G.-N. Sung, T.-Y. Yao, C.-Y. Juan, Y.-R. Lin, and C.-C. Wang, “Low-power 7.2 GHz complementary all-N-transistor logic using 90 nm CMOS technology,” 2009 IEEE Inter. Symp. on Circuits & Systems (ISCAS’2009), pp. 389-392, May 2009. | NSC96-2628-E-110-018-MY3 |
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| 177 | C.-C. Wang, J.-W. Liu, and R.-C. Kuo, “A 0.9 V to 5 V mixed-voltage I/O buffer using NMOS clamping technique,” 2009 IEEE Inter. Conf. on IC Design and Technology (ICICDT’2009), pp. 29~32, May 2009. | MOEA 97-EC-17-A-01-S1-104 |
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| 176 | C.-C. Huang, C.-L. Chen, and C.-C. Wang, "R-less and C-less self-sampled ASK demodulator for lower ISM band applications,'' 2008 Inter. SoC Design Conference (ISOCC'2008), pp. 281-284, Nov. 2008. | NSC 96-2923-E-110-001 |
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| 175 | C.-C. Wang, G.-N. Sung, C.-L. Wang, P.-C. Chen, M.-F. Luo, and H.-C. Hu, "Physical layer design for ECU nodes in FlexRay-based automotive communication systems ,'' 2009 IEEE Inter. Conf. on Consumer Electronics (ICCE'2009), paper 8.4-4, CD-ROM version, pp. 97, Jan. 2009. | NSC96-2628-E-110-018-MY3 |
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| 174 | C.-C. Huang, S.-F Yen, and C.-C. Wang, "A Li-ion battery charging design for biomedical implants,''2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS'2008), ?pp. 400-403, Nov. 2008.(accepted, paper no. 7396, July 2008) | NSC96-2628-E-110-019 |
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| 173 | C.-C. Wang, C.-.H. Hsu, T.-Y. Yao, and J.-M. Huang, "A ROM-less DDFS using a nonlinear DAC with an error compensation current array,''2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS'2008), ?pp. 1632-1635, Nov. 2008. (accepted, paper no. 7311, July 2008) | NSC
96-2628-E-110-019 |
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| 172 | J.-M. Huang, Y.-C. Lu, and C.-C. Wang, "All digital frequency synthesizer using a flying adder,'' 2008 The 19th VLSI Design/CAD Symposium, CD-ROM version, P1-1, pp. 78, Aug. 2008. | NSC96-2622-E-110-011 |
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| 171 | G.-N. Sung, C.-L. Wang, and C.-C. Wang, "The bus guardian design of FlexRay automotive communication systems,'' 2008 The 19th VLSI Design/CAD Symposium, CD-ROM version, S17-3, pp. 67, Aug. 2008. | NSC96-2628-E-110-018-MY3 |
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| 170 | T.-J. Lee, J.-W. Liu, T.-H. Tsai, and C.-C. Wang, "0.9 V to 5.0 V mixed-voltage I/O buffer design using 0.18 um 1.8-V CMOS technology,'' 2008 The 19th VLSI Design/CAD Symposium, CD-ROM version, S14-6, pp. 58, Aug. 2008. | NSC
95-2221-E-110-113 |
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| 169 | C.-C. Huang, J.-H. Wu, and C.-C. Wang, "A self-disable sense technique with differential NAND cell for content-addressable memories", 2008 IEEE International Conference on Electronics, Circuits, and Systems (ICECS'2008), , pp. 590-593, Aug. 2008. (accepted, paper no. 4489, May 2008) | NSC 96-2923-E-110-001 |
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| 168 | T.-J. Lee, W.-C. Chang, and C.-C. Wang,"Mixed-voltage I/O buffer design using 0.35 um CMOS technology,'' 2008 IEEE International Conference on Electronics, Circuits, and Systems (ICECS'2008), ?pp. 850-853, Aug. 2008.(accepted, paper no. 4487, May 2008) | NSC
95-2221-E-110-113 |
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| 167 | J.-M. Huang, C.-C. Lee, and C.-C. Wang, "A ROM-less direct digital frequency synthesizer based on 16-Segment parabolic polynomial interpolation, ''2008 IEEE International Conference on Electronics, Circuits, and Systems (ICECS'2008), ?pp. 1018-1021, Aug. 2008.(accepted, paper no. 4486, May 2008) | NSC96-2628-E-110-018 |
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| 166 | G.-N. Sung, C.-Y. Juan, and C.-C. Wang, "A 32-Bit carry lookahead adder design using complementary all-N-transistor logic,'' 2008 IEEE International Conference on Electronics, Circuits, and Systems (ICECS'2008), pp. 706-709, Aug. 2008.(accepted, paper no. 4485, May 2008) | NSC96-2628-E-110-018-MY3 |
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| 165 | G.-N. Sung, C.-Y. Juan, and C.-C. Wang, "Bus guardian design of automobile networking ECU nodes compliant with FlexRay standards,''2008 IEEE Inter. Symp. on Consumer Electronics (ISCE'2008), ?CD-ROM version, Apr. 2008.(accepted, paper. no. 1569098801, Mar. 2008) | NSC96-2628-E-110-018-MY3 |
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| 164 | C.-C. Wang, C.-C. Huang, J.-H. Wu, I.-Y. Huang, C.-P. Li, Y.-C. Lee, and W.-J. Wu, “A mini-invasive multi-function bladder urine pressure measurement system,” 2008 IEEE Inter. Symp. on Circuits and Systems, pp. 3174-3177, May 2008.(accepted, paper no. 2859, Jan. 2008) | NSC 94-2213-E-110-053 |
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| 163 | T.-H. Tsai, C.-L. Chen, C.-L. Lee, and C.-C. Wang, “Power-saving nano-scale DRAMs with an adaptive refreshing clock generator,” 2008 IEEE Inter. Symp. on Circuits and Systems, pp. 612-615, May 2008.(accepted, paper no. 2099, Jan. 2008) | NSC95-2622-E-110-012-CC3 |
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| 162 | G.-N. Sung, Y.-J. Ciou, and C.-C. Wang, “A power-aware 2-dimensional bypassing multiplier using cell-based design flow,” 2008 IEEE Inter. Symp. on Circuits and Systems, pp. 3338-3341, May 2008. (accepted, paper no. 1768, Jan. 2008) | NSC95-2623-7-110-003-ET |
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| 161 | T.-J. Lee, Y.-C. Liu, and C.-C. Wang, “1.8 V to 5.0 V mixed-voltage-tolerant I/O buffer with 54.59% output duty cycle,” 2008 Inter. Symp. On VLSI Design, Automation and Test (2008 VLSI-DAT), pp. 93-96, Apr. 2008. (accepted, Dec. 2007) | NSC 95-2221-E-110-113 |
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| 160 | C.-C. Wang and C.-C. Huang, “A system prototype for portable wireless medical devices,” 2008 IEEE Inter. Conf. on Consumer Electronics (ICCE'2008), paper P2-27, CD-ROM , Jan. 2008.(accepted, paper no. 1274, Sep. 2007) | NSC94-2213-E-110-022 |
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| 159 | C.-C. Wang, G.-N. Sung, and P.-C. Chen, “A transceiver design for ECU nodes in FlexRay-based automotive communication systems,” 2008 IEEE Inter. Conf. on Consumer Electronics (ICCE'2008), ?paper 7.2-3, CD-ROM , Jan. 2008. (accepted, paper no. 1157, Sep. 2007) | NSC95-2221-E-110-113 |
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| 158 | T.-J. Lee, W.-C. Chang, and C.-C. Wang, “Mixed-voltage-tolerant I/O buffer using a clamping dynamic gate bias generator,” IEEE TENCON 2007, ?pp. 148, CD-ROM, FrSC-O9.3, Oct. 2007.(accepted, paper no. 00222, June 2007) | NSC95-2221-E-110-113 |
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| 157 | J.-M. Huang, C.-L. Lee, J.-T. Chen, and C.-C. Wang, “A low power DDFS design with error compensation using a nonlinear digital-to-analog converter,” Inter. Symp. on Integrated Circuits 2007 (ISIC-2007), pp. 604-607, Sep. 2007. (accepted, paper no. conf103a92, May 2007) | NSC94-2213-E-110-022 |
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| 156 | T.-J. Lee, C.-L. Lee, Y.-J. Ciou, C.-C. Huang, and C.-C. Wang, “C-less and R-less low-frequency ASK demodulator for wireless implantable devices,” Inter. Symp. on Integrated Circuits 2007 (ISIC-2007), pp. 644-647, Sep. 2007. (accepted, paper no. conf103a91, May 2007) | NSC94-2213-E-110-053 |
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| 155 | C.-C. Huang, G.-L. Jhuang, and C.-C. Wang, “A direct digital frequency synthesizer with CMOS OTP ROM,” Inter. Symp. on Integrated Circuits 2007 (ISIC-2007), (accepted, paper no. conf 103a84, May 2007), pp. 116-119, Sep. 2007. | NSC94-2213-E-110-053 |
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| 154 | T.-J. Lee, T.-Y. Chang, and C.-C. Wang, “Mixed-voltage-tolerant I/O buffer design,” Inter. Symp. on Integrated Circuits 2007 (ISIC-2007), (accepted, paper no. conf103a82, May 2007), pp. 596-599, Sep. 2007. | NSC95-2221-E-110-113 |
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| 153 | C.-C. Wang, C.-C. Huang, J.-S. Liou, Y.-J. Ciou, I.-Y. Huang, C.-P. Li, Y.-C. Lee, and W.-J. Wu, “An Implantable Long-term Bladder Urine Pressure Measurement System with a 1-atm Canceling Instrumentation Amplifier,” 2007 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2007), pp. 2383-2386, May 2007. | NSC92-2218-E-110-001 |
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| 152 | C.-C. Wang, G.-N. Sung, K.-W. Fang, and S.-L. Tseng, “A Low-power Sensorless Inverter Controller of Brushless DC Motors,” 2007 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2007), pp. 2435-2438, May 2007. | NSC95-2623-7-110-003-ET |
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| 151 | C.-C. Wang, J.-M. Huang, L.-H. Lee, S.-H. Wang, and C.-P. Li, “A low-power 2.45 GHz ZigBee transceiver for wearable personal medical devices in WPAN,” 2007 IEEE Inter. Conf. on Consumer Electronics (ICCE 2007), p. 111, CR-ROM, Jan. 2007. | NHRI-EX94-9319EI |
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| 150 | C.-C. Wang, M.-K. Chang, and T.-W. Cheng, “DVB-T receiver with a fully digital I/Q separator,” 2007 IEEE Inter. Conf. on Consumer Electronics (ICCE 2007), p. 25, CR-ROM, Jan. 2007. | NSC94-2213-E-110-022 |
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| 149 | C.-C. Wang, G.-N. Sung, J.-Y. Liao, J. Chang, and R. Hu, “Handheld DVB-T digital TV with an automatic antenna selection method for mobile reception,” 2007 IEEE Inter. Conf. on Consumer Electronics (ICCE 2007), p. 25, CR-ROM, Jan. 2007. | NSC94-2213-E-110-022 |
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| 148 | C.-C. Wang, J.-J. J. Chen, C.-C. Huang, T.-J. Lee, C.-M. Wu, K.-W. Fang, G.-N. Sung, S.-L. Tseng, G.-L. Jhuang, J.-S. Liou, J.-H. Lin, Y.-J. Ciou, “Ultra-low Power Implantable Neural Signal Interface,” 2006 Inter. Symp. on Biomedical Engineering (2006 ISOBME), CD-ROM, paper no. 10163, Dec. 2006. | NSC94-2213-E-110-053 | Download |
| 147 | C.-C. Wang, G.-N. Sung, and J.-H. Lin, “Codec design for variable-length to fixed-length data conversion for H.263,” Proc. of 2006 IEEE Inter. Conf. on Intelligent Information Hiding and Multimedia Signal Processing (IIHMSP-2006), pp. 483-486, Dec. 2006. | NSC94-2213-E-110-022 |
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| 146 | C.-C. Wang, G.-N. Sung, M.-K. Chang, C.-L. Lee, C.-M. Wu, and J.-Y. Chen, “A low-power 4-T SAM design for OFDM demodulators in DVB receivers,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), p. 90, CD-ROM, Dec. 2006. | NSC94-2213-E-110-022 |
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| 145 | C.-C. Wang, C.-C. Huang, T.-J. Lee, C.-M. Wu, G.-N. Sung, K.-W. Fang, S.-L. Tseng, and J.-J. Chen, “An implantable SOC chip for micro-stimulating and neural signal recording,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), p. 63, CD-ROM, Dec. 2006. | NSC94-2213-E-110-053 |
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| 144 | C.-C. Wang, G.-N. Sung, M.-K. Chang, and Y.-Y. Shen, “Energy-efficient double-edge triggered flip-flop design,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), p. 127, CD-ROM, Dec. 2006. | NSC94-2213-E-110-022 |
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| 143 | C.-C. Wang, T.-J. Lee, C.-C. Li, and R. Hu, “An all-MOS high linearity voltage-to-frequency converter chip with 520 KHz/V sensitivity,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), p. 39, CD-ROM, Dec. 2006. | NHRI-EX93-9319EI |
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| 142 | C.-C. Wang, C.-C. Huang, T.-J. Lee, and U. F. Chio, “A linear LDO regulator with modified NMCF frequency compensation independent of off-chip capacitor and ESR,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), p. 75, CD-ROM, Dec. 2006. | NHRI-EX93-9319EI |
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| 141 | C.-C. Wang, C.-C. Huang, J.-S. Liou, and K.-W. Fang, “A 140-dB CMRR low-noise instrumentation amplifier for neural signal sensing,” 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), p. 64, CD-ROM, Dec. 2006. | NHRI-EX94-9319EI |
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| 140 | C.-C. Wang, G.-N. Sung, and J.-Y. Liao, “Cost-effective residue amplifier design for sensorless BLDC motor control,” 2006 Workshop on Consumer Electronics and Signal Processing (WCEsp 2006), CD-ROM, p. 42, Nov. 2006. | NSC94-2623-7-110-003-ET |
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| 139 | C.-C. Wang, J.-M. Huang, and T.-Y. Zhang, “10-bit 30-MSample/s low power pipeline ADC for DVB-H receiver systems,” 2006 Workshop on Consumer Electronics and Signal Processing (WCEsp 2006), CD-ROM, p.36, Nov. 2006. | NSC94-2213-E-110-024 |
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| 138 | C.-C. Wang, J.-M. Huang, C.-Y. Chang, K.-T. Cheng, and C.-P. Li, “A 6.57 mW ZigBee Transceiver for 868/915 MHz Band,” 2006 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2006), pp. 5195-5198, May 2006. | NSC92-2220-E-110-001 |
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| 137 | C.-C. Wang, C.-L. Lee, and W.-J. Lin, “A 4-Kb Low Power 4-T SRAM Design with Negative Word-Line Gate Drive,” 2006 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2006), pp. 4127-4130, May 2006. | NSC92-2220-E-110-001 |
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| 136 | C.-C. Wang, J.-M. Huang, Y.-M. Tseng, and C.-Y. Chang, “A 0.18 µm CMOS prototype of COFDM demodulator for European DVB-T standard,” 2006 International Symposium on VLSI Design, Automation & Test (VLSI-DAT), pp. 71-74, Apr. 2006. | NSC94-2213-E-110-022 |
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| 135 | C.-C. Wang and G.-N. Sung, “A Low-Power 2-Dimensional Bypassing Multiplier Using 0.35 um CMOS Technology,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), pp. 405-408, March 2006. | NSC92-2220-E-110-001 |
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| 134 | C.-C. Wang, J.-M. Huang, C.-Y. Chang, and C.-P. Li, “868/915 MHz ZigBee Receiver for Personal Medical Assistance,” 2006 Inter. Conf. on Consumer Electronics (ICCE 2006), pp. 461-462, Jan. 2006. | NSC92-2220-E-110-001 |
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| 133 | C.-C. Wang, H. K. Lo, S.-P. Lin, and R. Hu, “High-Sensitivity and High-Mobility Compact DVB-T Receiver for In-Car Entertainment,” 2006 Inter. Conf. on Consumer Electronics (ICCE 2006), pp. 423-424, Jan. 2006. | Download | |
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| 132 | C.-C. Wang, J.-M. Huang, and K.-T. Cheng, “Low-Power 5-bit 2.4 MS/s successive approximation ADC for ZigBee Receiver using 868/915 MHz Band,” 2005 Workshop on Consumer Electronics and Signal Processing, (WCEsp 2005), CR-ROM version, pp. 108, Nov. 2005. | NSC93-2220-E-110-004 | Download |
| 131 | C.-C. Wang and G.-N. Sung, “A Power-Aware 8×8 Multiplier Using 2-Dimensional Bypassing Method,” 2005 Workshop on Consumer Electronics and Signal Processing, (WCEsp 2005), CR-ROM version, pp. 4, Nov. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 130 | C.-C. Wang, J.-M. Huang, and T.-K. Cheng, “A 9-bit 20-MSample/s pipeline ADC for NTSC video decoders,” 2005 Inter. Symp. on Communications, CR-ROM version, P1-30, Nov. 2005. | NSC93-2220-E-110-001 NSC93-2220-E-110-004 |
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| 129 | C.-C. Wang, Y.-L. Tseng, S.-F. Hong, and K.-T. Cheng, “10-bit 80 Msps ADC using closed-loop MDACs for DVB-T receivers,” 2005 Inter. Symp. on Communications, CR-ROM version, S13-4, Nov. 2005. | NSC93-2220-E-110-001 NSC93-2220-E-110-004 |
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| 128 | C.-C. Wang, Y.-L. Tseng, and Y.-S. Chang, “A 19-T full adder with high impedance circuits and conflict circuits for mobile devices’ controllers,” 2005 Inter. Symp. on Communications, CR-ROM version, S6-2, Nov. 2005. | NSC93-2220-E-110-001 NSC93-2220-E-110-004 |
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| 127 | C.-C. Wang, T.-J. Lee, and S.-L. Tseng, “A low-power all-digital phase-locked loop using binary frequency searching,” 2005 Inter. Symp. on Communications, CR-ROM version, S13-1, Nov. 2005. | NHRI-EX93-9319EI NSC92-2218-E-110-001 |
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| 126 | C.-C. Wang, C.-L. Lee, and Y.-S. Chang, “Low power CMOS output cell design with spike filtering for baseband digital signal processing,” 2005 Inter. Symp. on Communications, CR-ROM version, S6-1, Nov. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 125 | C.-C. Wang, C.-L. Lee, and T.-W. Cheng, “A low power high-speed 8-bit pipelining CLA Design using dual threshold voltage domino logic,” 2005 The 16th VLSI Design/CAD Symposium, P1-34, CD-ROM version, Aug. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 124 | C.-C. Wang, T.-J. Lee, and K.-W. Fang, “Dual-OPA coil driver for heat dissipation of SOC’s,” 2005 The 16th VLSI Design/CAD Symposium, P1-1, CD-ROM version, Aug. 2005. | NHRI-EX93-9319EI NSC92-2218-E-110-001 |
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| 123 | C.-C. Wang, J.-M. Huang, and Y.-M. Tseng, “Low-power bus driver design based on a charge recycle technique,” 2005 The 16th VLSI Design/CAD Symposium, P1-8, CD-ROM version, Aug. 2005. | NSC93-2220-E-110-004 | Download |
| 122 | C.-C. Wang, C.-L. Lee, and C.-C. Hung, “A CMOS IF-band mixed-signal converter design for DVB-T receivers,” 2005 The 16th VLSI Design/CAD Symposium, P2-30, CD-ROM version, Aug. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 121 | C.-C. Wang, C.-L. Lee, L.-P. Lin, and Y.-L. Tseng, “Wideband 70dB CMOS digital variable gain amplifier design for DVB-T receiver’s AGC,” 2005 IEEE Symp. on Circuits and Systems (ISCAS 2005), pp. 356-359, May 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 120 | C.-C. Wang, C.-L. Lee, and C.-C. Hung, “A Gm-C anti-aliasing filter design with digitally tunable bandwidth for DVB-T receivers,” Inter. Conf. on Systems and Signals (ICSS 2005), pp. 985-989, Apr. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 119 | C.-C. Wang and T.-J. Lee, “An 80 MHz PLL chip with supply noise rejection using separate regulators,” Inter. Conf. on Systems and Signals (ICSS 2005), pp. 973-976, Apr. 2005. | NHRI-EX93-9319EI NSC92-2218-E-110-001 |
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| 118 | C.-C. Wang, J.-M. Huang, and L.-P. Lin, “A low-jitter 80 MHz PLL for DVB-T receivers,” Inter. Conf. on Systems and Signals (ICSS 2005), pp. 990-993, Apr. 2005. | NSC93-2220-E-110-004 | Download |
| 117 | C.-C. Wang and C.-C. Huang, “A 38-dB stopband attenuation and 120-dB CMRR small-area LNA for neural signal sensing and recording,” Inter. Conf. on Systems and Signals (ICSS 2005), pp. 1515-1519, Apr. 2005. | NHRI-EX93-9319EI NSC92-2218-E-110-001 |
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| 116 | C.-C. Wang, J.-M. Huang, and H.-C. Cheng, “A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers,” 2005 Inter. Conf. on Consumer Electronics (ICCE 2005), CD-ROM version, 4.1-2, Jan. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 115 | C.-C. Wang, C.-L. Lee, and M.-K. Chang, “Low-cost video decoder with 2D2L comb filter for NTSC digital TVs,” 2005 Inter. Conf. on Consumer Electronics (ICCE 2005), CD-ROM version, 6.4-10, Jan. 2005. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 HiMax 92A20703 |
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| 114 | C.-C. Wang, T.-J. Lee, C.-C. Hung, and R. Hu, “High-PSR NTSC Video Sync Separator,” 2004 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2004), 6C.2, pp. 75, CR-ROM version, Dec. 2004. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 113 | C.-C. Wang, C.-L. Lee, C.-Y. Hsiao, and J.-F. Huang, “Clock recovery and data recovery design for LVDS transceiver used in LCD panels,” 2004 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2004), P3.11, pp. 82, CR-ROM version, Dec. 2004. | AUO 92A20353 NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 112 | C.-C. Wang, C.-L. Lee, and P.-L. Liu, ”Power-Aware Design of An 8-Bit Pipelining Asynchronous ANT-based CLA Using Data Transition Detection,” 2004 IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2004), 1B.3, pp. 23, CR-ROM version, Dec. 2004. | NHRI-EX93-9319EI NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 111 | C.-C. Wang, J.-M. Huang, and H.-C. Cheng, “A 2K/8K Dual-Mode FFT Processor for OFDM of DVB-T Receivers,” 2004 The 15th VLSI Design/CAD Symposium, P1-16, pp. 22, CD-ROM version, Aug. 2004. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 110 | C.-C. Wang and J.-M. Huang, “1.0 Gbps LVDS transceiver design using a common mode DC biasing,” 2004 The 15th VLSI Design/CAD Symposium, B3-1, pp. 14, CD-ROM version, Aug. 2004. | AUO 92A20353 NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 109 | C.-C. Wang, Y.-H. Hsueh, Y.-T. Hsiao, U Fat Chio, C.-C. Huang, and P.-L. Liu, “An Implantable Neural Interface Micro-stimulator Chip with External Controllability,”2004 The Fourth IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC 2004), pp. 356-359, Aug. 2004. | NHRI-EX93-9319EI NSC92-2218-E-110-001 |
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| 108 | C.-C. Wang, J.-M. Huang, and J.-F. Huang, “1.0 Gbps LVDS transceiver design for LCD panels,” 2004 The Fourth IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC 2004), pp. 236-239, Aug. 2004. | AUO 92A20353 NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 107 | C.-C. Wang, C.-L. Lee, and P.-L. Liu, “Power-aware pipelining design of an 8-bit CLA using PLA-styled all-N-transistor logic,” 2004 2nd Northeast Workshop on Circuits and Systems (NEWCAS 2004), pp. 149-152, June 2004. | NHRI-EX93-9319EI NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 106 | C.-C. Wang, C.-L. Lee, C.-Y. Hsiao, and J.-F. Huang, “Clock recovery and data recovery design for LVDS transceiver used in LCD panels,” 2004 2nd Northeast Workshop on Circuits and Systems (NEWCAS 2004), pp. 185-188, June 2004. | AUO 92A20353 NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 105 | C.-C. Wang, Y.-L. Tseng, T.-J. Lee, and R. Hu, “High-PSR bias circuitry for NTSC sync separation,” 2004 Inter. Symp. on Circuits and Systems (ISCAS ”04), vol. I, pp. 329-332, May 2004. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 NSC92-2218-E-110-001 |
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| 104 | C.-C. Wang, Y.-H. Hseuh, U. F. Chio, and Y.-T. Hsiao, “A C-less ASK demodulator for implantable neural interfacing chips,” 2004 Inter. Symp. on Circuits and Systems (ISCAS ”04), vol. IV, pp. 57-60, May 2004. | NSC92-2218-E-110-001 NHRI-EX93-9319EI |
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| 103 | C.-C. Wang, Y.-H. Hseuh, S.-F. Hong, and R.-S. Kao, “A phase-adjustable negative phase shifter using a single-shot locking method,” 2004 Inter. Symp. on Circuits and Systems (ISCAS ”04), vol. II, pp. 933-936, May 2004. | NSC92-2220-E-110-001 NSC92-2220-E-110-004 |
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| 102 | C.-C. Wang, Y.-L. Tseng, and C.-C. Chen, “Codec Design for Variable-Length to Fixed-Length Data Compression by Using Mutli-Symbol Encoding,” 2003 Inter. Conf. on Informatics, Cybernetics and Systems (ICICS 2003), pp. 351 (CD-ROM version), Dec. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 101 | C.-C. Wang, Y.-H. Hsueh, Y.-T. Hsiao, and U. F. Chio, “Baseband design of a wireless transceiver for implantable neural interface,” 2003 Inter. Symp. on Communications, pp. 69 (CD-ROM version), Dec. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 100 | C.-C. Wang, Y.-H. Hsueh, T.-W. Kuo, and R. Hu, “A boosted wordline voltage generator for low-voltage memories,” 2003 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), pp. 806-809, Dec. 2003. | NSC88-2219-E-110-001 NSC89-2215-E-110-014 |
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| 099 | C.-C. Wang, Y.-L. Tseng, T.-H. Chen, and R. Hu, “Dual-polarity high voltage generator design for non-volatile memories,” 2003 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), pp. 248-251, Dec. 2003. | NSC88-2219-E-110-001 NSC89-2215-E-110-014 |
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| 098 | C.-C. Wang, Y.-L. Tseng, C.-C. Chen, and C.-S. Chen, “Low-cost NTSC digital video decoder using 4θ-based DDFS,” 2003 Workshop on Consumer Electronics (WCE2003), pp. 41 (CD-ROM version), Nov. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 097 | C.-C. Wang, Y.-L. Tseng, T.-J. Lee, and R. Hu, “Low-variation 1.0 MHz clock generator with temperature compensation bias,” 2003 Workshop on Consumer Electronics (WCE2003), pp. 133 (CD-ROM version), Nov. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 096 | C.-C. Wang, Y.-L. Tseng, C.-C. Li, and R. Hu, “58 MHz/V sensitivity CMOS voltage-to-frequency converter using a current-mode voltage window comparator,” 2003 The 14th VLSI Design/CAD Symposium, pp. 32, C2-7, Aug. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 095 | C.-C. Wang, Y.-L. Tseng, W.-J. Lin, and R. Hu, “A phase-adjustable ROM-less direct digital frequency synthesizer with 41.66 MHz output frequency,” 2003 The 14th VLSI Design/CAD Symposium, pp. 50, C3-8, Aug. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 094 | C.-C. Wang, Y.-L. Tseng, C.-S. Chen, and R. Hu, “38.9 µW/MHz small-area digital I/O cell,” 2003 The 14th VLSI Design/CAD Symposium, pp. 66, C4-7, Aug. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 093 | C.-C. Wang, Y.-L. Tseng, C.-C. Li, and R. Hu, “A 1.26ns access time current-mode sense amplifier design for SRAMs,” 2003 The 14th VLSI Design/CAD Symposium, pp. 36, C3-6, Aug. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 092 | C.-C. Wang, Y.-L. Tseng, H.-C. Cheng, and R. Hu, “Switched-Current 3-bit CMOS Wideband Random Signal Generator,” 2003 Southwest Symp. on Mixed-Signal Design (SSMSD 2003), pp. 186-189, Feb. 2003. | NSC91-2218-E-110-001 NSC91-2622-E-110-004 |
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| 091 | C.-C. Wang, T.-H. Chen, and R. Hu, “A 4-Kb 667-MHz CMOS SRAM using dynamic threshold voltage wordline transistors,” 2003 Southwest Symp. on Mixed-Signal Design (SSMSD 2003), pp. 90-93, Feb. 2003. | NSC91-2622-E-110-011-CC3 | Download |
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| 090 | C.-C. Wang, P.-M. Lee, and K.-L. Chen, “6-T SRAM using dual threshold voltage transistors and low-power quenchers,” 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002), pp. 827-830, Sep. 2002. | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 089 | C.-C. Wang, H.-C. She, and R. Hu, “A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications,” 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002), pp. 69-72, Sep. 2002. | NSC89-2215-E-110-014 | Download |
| 088 | C.-C. Wang, H.-C. She, and R. Hu, “A ROM-less direct digital frequency synthesizer by using trigonometric quadruple angle formula,” 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002), pp.65-68, Sep. 2002 | NSC89-2215-E-110-014 | Download |
| 087 | C.-C. Wang and H.-C. Cheng, “A power-efficient clamping circuit for charge pumps used in low voltage memories,” 2002 The 13th VLSI Design/CAD Symposium, pp. 80, Aug. 2002. | NSC89-2215-E-110-014 NSC88-2219-E-110-001 |
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| 086 | C.-C. Wang, H.-Y. Leo, and R. Hu, “A 4-Kb 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches,” The third 2002 IEEE Asia-Pacific Conference on ASICs (AP-ASIC 2002), pp. 49-52, Aug. 2002. | NSC89-2215-E-110-014 | Download |
| 085 | C.-C. Wang, Y.-H. Hseuh, C.-S. Chen, and J.-F. Huang, “A low-cost plasma display panel data dispatcher for image enhancement,” 2002 IEEE Inter. Conf. on Consumer Electronics (ICCE 2002), pp. 4-5, June 2002. EI | Download | |
| 084 | C.-C. Wang, Y.-L. Tseng, Y.-P. Chen, and C.-J. Huang, “A fast inner product processor implementation for multi-valued exponential bidirectional associative memories,” 2002 Inter. Symp. on Circuits and Systems (ISCAS 2002), vol. II, pp. 113-116, May 2002. EI | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 083 | C.-C. Wang, Y.-H. Hsueh, and Y.-W. Chen, “A 6.4 Gbps FIFO Design for 8-32 two-way Data Exchange Bus,” 2002 Inter. Symp. on Circuits and Systems (ISCAS 2002), vol. II, pp. 772-775, May 2002. EI | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 082 | C.-C. Wang and Y.-W. Chen, “An FIFO memory design for 8-to-32 data exchange bus,” 2001 National Computer Symposium (NCS 2001) - Computer Architecture & Parallel Systems, pp. C085-C094, Dec. 2001. | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 081 | C.-C. Wang, Y.-L. Tseng, and C.-W. Chen, “Robust reference clock generator design for DDR synchronous devices,” 2001 National Computer Symposium (NCS 2001) - Computer Architecture & Parallel Systems, pp. C069-C076, Dec. 2001. | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 080 | C.-C. Wang, P.-M. Lee, and Y.-A. Huang, “4x8 keypad scanner with RC5 protocol for wireless handsets,” 2001 The Third International Conference on Information, Communications and Signal Processing (ICICS 2001), 1C2.5, CD-ROM version, pp.27, Oct. 2001 | NSC88-2219-E-110-001 NSC89-2215-E-110-014 |
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| 079 | C.-C. Wang, P.-M. Lee, J.-J. Wang, and C.-J. Huang, “Design of a cycle-efficient 64b/32b integer divider using a table-sharing method,” 2001 International IEEE Conference on Electronics, Circuits, and Systems (ICECS2001), vol. II, pp 921-924, Sep. 2001. | NSC89-2215-E-110-017 NSC89-2215-E-110-014 |
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| 078 | C.-C. Wang, Y.-H. Hsueh, and Y.-P. Chen, “An area-saving 3-dimensional decoder structure for ROMs,” 2001 International IEEE Conference on Electronics, Circuits, and Systems (ICECS2001), vol. II, pp. 573-576, Sep. 2001. | NSC89-2215-E-110-017 NSC89-2215-E-110-014 |
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| 077 | C.-C. Wang, C.-C. Chiu, and Y.-T. Chien, “Fast half-swing inter-plane circuits for clocked NOR-NOR PLAs,” 2001 International IEEE Conference on Electronics, Circuits, and Systems (ICECS2001), vol. I, pp. 233-236, Sep. 2001. | NSC89-2215-E-110-017 NSC89-2215-E-110-014 |
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| 076 | C.-C. Wang, Y.-L. Tseng, and R.-S. Kao, “A 1.0 GHz clock generator design with a negative delay using a single-shot locking method,” 2001 International IEEE Conference on Electronics, Circuits, and Systems (ICECS2001), vol. III, pp. 1123-1126, Sep. 2001. | NSC89-2215-E-110-017 NSC89-2215-E-110-014 |
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| 075 | C.-C. Wang, Y.-H. Hsueh, C.-W. Chen, J.-J. Wang, and R. Hu, “A cost-effective 8051-based Chinese voice dialer for DECT handsets,” 2001 9th Inter. Symp. on Integrated Circuits, Devices & Systems (ISIC-2001), pp. 378-381, Sep. 2001. EI | Download | |
| 074 | C.-C. Wang, C.-W. Chen, and Y.-L. Huang, “VLSI circuit design of 16-Mbps IrDA VFIR transceivers,” 2001 9th Inter. Symp. on Integrated Circuits, Devices & Systems (ISIC-2001), pp. 374-377, Sep. 2001. EI | NSC89-2215-E-110-014 | Download |
| 073 | C.-C. Wang, R.-S. Kao, P.-M. Lee, and Y.-L. Huang, “A realized SONY PS2 1-to-4 joystick multiplexer interface,” The 5th World Multiconference on Circuits, Systems, Communications & Computers (CSCC2001), Part 1: Signal Processing, pp. 151-155, Sep. 2001 | NSC89-2218-E-110-014 | Download |
| 072 | C.-C. Wang and C.-C. Chiu, “A 4Kb DRAM using temperature-insensitive self-recharging circuitry,” 2001 The 12th VLSI Design/CAD Symposium, C3-6, pp. 63, Aug. 2001. | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 071 | C.-C. Wang and J.-J. Wang, “Address transition detector with high noise immunity,” 2001 The 12th VLSI Design/CAD Symposium, C3-3, pp. 62, Aug. 2001. | NSC89-2215-E-110-014 NSC89-2215-E-110-015 |
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| 070 | C.-C. Wang, P.-M. Lee, R.-C. Lee, and C.-T. Huang, “A 1.25 GHz 32-bit tree-structured carry lookahead adder,” 2001 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2001), vol. IV, pp. 80-83, May 2001. EI | NSC89-2218-E-110-014 NSC89-2218-E-110-015 |
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| 069 | C.-C. Wang, R.-S. Kao, and Y.-L. Huang, “100 Mbps ethernet network interface control IC,” 2000 National Symposium on Telecommunications, vol. 1, pp. 1-390-1-395, Dec. 2000. | NSC89-2219-E-110-001 | Download |
| 068 | C.-C. Wang, P.-M. Lee, C.-J. Huang, and R.-C. Lee, “A 1.25 GHz 8-bit tree-structured carry lookahead adder,” Workshop on Computer Architecture of 2000 International Computer Symposium (ICS 2000), pp. 107-113, Dec. 2000. | NSC88-2219-E-110-001 | Download |
| 067 | C.-C. Wang, Y.-H. Hsueh, and S.-K. Huang, “A low-power and area-saving 8-bit analog-to-digital converter using a binary searching method,” 2000 Symp. on Computer and Communication (SCC 2000), pp. 4B-1-4B-4, Oct. 2000. | NSC87-2215-E-110-010 NSC88-2219-E-110-001 |
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| 066 | C.-C. Wang, Y.-H. Hsueh, Y.-L. Tseng, and S.-K. Huang, “FPGA-based system prototyping for smart battery management of mobile handsets,” 11th VLSI Design/CAD Symposium, pp. 113-116, Aug. 2000. | NSC88-TPC-7-110-011 | Download |
| 065 | C.-C Wang and C.-F. Tsai, “A novel neural architecture with high storage capacity,” IEEE-INNS-ENNS Inter. Joint Conf. on Neural Networks 2000 (IJCNN 2000), vol. V, pp. 617-621, July 2000. EI | NSC88-2219-E-110-001 NSC89-2215-E-110-014 NSC89-2215-E-110-017 |
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| 064 | C.-C. Wang, H.-L. Wu, and S.-K. Huang, “A fast tagged sorter used in 100/10 Mbps routers,” 2000 IEEE Inter. Conf. on Consumer Electronics (ICCE 2000), pp. 376-377, June 2000. EI | NSC88-2219-E-110-001 NSC89-2215-E-110-014 |
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| 063 | C.-C. Wang, P.-M. Lee, and C.-J. Huang, “Improved Design of C2PL 3-2 compressors with less transistor count,” 2000 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2000), vol. IV, pp. 61-64, May 2000. EI | NSC88-2219-E-110-001 NSC89-2215-E-110-014 |
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| 062 | C.-C. Wang, H.-L. Wu, and C.-F. Wu, “A fast dynamic 64-bit comparator with small transistor count,” 2000 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2000), vol. V, pp. 545-548, May 2000. EI | NSC88-2219-E-110-001 NSC89-2215-E-110-014 |
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| 061 | C.-C. Wang, Y.-T. Chien, and Y.-P. Chen, “Design of an inter-plane circuit for clocked PLAs,” 2000 IEEE Inter. Symp. on Circuits and Systems (ISCAS 2000), vol. IV, pp. 281-284, May 2000. | NSC87-2215-E-110-010 NSC88-2219-E-110-014 |
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| 060 | C.-C. Wang, Y.-H. Hsueh, Y.-L. Tseng, S.-K. Huang, and S.-F. Hsiao, “Universal current integration module IC design for smart battery management of mobile handsets,” 1999 National Computer Sumposium (NCS ’99), vol. I, pp. A525-A531, Dec. 1999. | NSC88-TPC-7-110-011 | Download |
| 059 | C.-C. Wang, H.-L. Wu, and S.-K. Huang, “A distributed neural-net training strategy for recognition of Chinese numbers used in the voice dialer of mobile handsets,” 1999 National Computer Sumposium (NCS ’99), vol. II, pp. B197-B200, Dec. 1999. | NSC87-2215-E-110-010 NSC88-2219-E-110-001 |
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| 058 | C.-C. Wang and C.-F. Tsai, “The industrial application of optical character recognition using PBHAN,” Inter. Symp. on Multimedia Information Processing (ISMIP ’99), pp. 289-296, Dec. 1999. | NSC88-2219-E-110-001 | Download |
| 057 | C.-C. Wang and C.-F. Tsai, “A neural network processing model for address learning and recognition,” 2nd International Conference on Information, Communications & Signal Processing (ICICS ’99), CD-ROM version, paper no. 396, Dec. 1999. | NSC88-2219-E-110-001 | Download |
| 056 | C.-C. Wang, C.-J. Huang, H.-L. Wu, and H.-M. Yang, “Hardware realization of a bit-serial 16-bit multiplier using low-power high-speed FPGA logic module for DSP applications,” 1999 International Symposium on Communications (ISCOM ’99), pp. 544-546, Nov. 1999. | NSC86-2215-E-110-013 | Download |
| 055 | C.-C. Wang, C.-J. Huang, and Y.-H. Hsueh, “A design of a bipolar-valued inner product processor for speech processing,” 1999 International Symposium on Communications (ISCOM ’99), pp. 135-139, Nov. 1999. | NSC86-2215-E-110-013 | Download |
| 054 | C.-C. Wang, C.-F. Wu, S.-H. Chen, and C.-H. Kao, “A real chip used in low-cost testing modules for liquid crystal display drivers,” 8th International Symposium on Integrated Circuits, Devices, & Systems (ISIC-99), pp. 479-482, Singapore, Sep. 1999. | NSC86-2622-E-009-009 |
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| 053 | C.-C. Wang, S.-H. Chen, S.-F. Hsaio, and C.-L. Wu, “Design and verification of four non-homogeneous ALUs for 8-issue 64-Bit x86-compatible superscaler microprocessors,” 1999 The 6th IEEE Inter. Conf. on Electronics, Circuits and Systems (ICECS ’99), vol. 3, pp. 1217-1220, Sep. 1999. | Download | |
| 052 | C.-C. Wang, C.-J. Huang, G.-C. Lin, and C.-F. Wu, “A chip design of radix-4/2 64b/32b signed and usigned integer divider using COMPASS cell library,” 1999 Inter. Symp. on Circuits & Systems (ISCAS ’99), vol. I, pp. 439-442, June 1999. EI | NSC88-2219-E-110-001 | Download |
| 051 | C.-C. Wang and C.-F. Tsai, “Theoretical expectation value of the capacity of fuzzy polynomial bidirectional hetero-correlator,” 1999 Inter. Symp. on Circuits & Systems (ISCAS ’99), vol. V, pp. 583-586, June 1999. EI | NSC88-2219-E-110-001 | Download |
| 050 | C.-C. Wang, C.-J. Huang, and P.-M. Lee, “A comparison of two alternative architectures of digital ratioed compressor design for inner product processing,” 1999 Inter. Symp. on Circuits & Systems (ISCAS ’99), vol. I, pp. 161-164, June 1999. EI | NSC88-2219-E-110-001 | Download |
| 049 | C.-C. Wang, Y.-T. Chien, and Y.-P. Chen, “A practical load-optimized VCO design for low-jitter 5V 500 MHz digital phase-locked loop,” 1999 Inter. Symp. on Circuits & Systems (ISCAS ’99), vol. II, pp. 528-531, June 1999. EI | NSC89-2215-E-110-010 | Download |
| 048 | C.-C. Wang, I.-Y. Chang, and C.-F. Wu, “Cell-based implementation of a mixed-radix-8/4/2 64b/32b signed integer divider using COMPASS cell library,” 1999 Symposium of Microprocessors Design, pp. 124-131, May 1999. | NSC88-2219-E-110-001 | Download |
| 047 | C.-C. Wang, Y.-T. Chien, and Y.-P. Chen, “Power-saving fast half-swing inter-plane circuit for clocked PLAs,” 1999 Symposium of Microprocessors Design, pp. 141-148, May 1999. | NSC87-2215-E-110-010 |
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| 046 | C.-F. Tsai and C.-C. Wang, “Construction of a secure of web database using active server pages technology,” Cross-Century Worldwide Academic Conference, pp. 267-274, March 1999. | Download | |
| 045 | C.-F. Tsai and C.-C. Wang, “Computer assisted learning system - the architecture of WWW software for multimedia computer assembly,” The 8th International Conference on Computer-Aided Instruction, pp. 10-17, March 1999. | Download | |
| 044 | C.-C. Wang, C.-J. Huang, and S.-H. Chen, “An image processing appraoch for wafer scratch identification,” 1998 Inter. Computer Symp. (ICS ’98) Workshop on Image Processing and Character Recognition, pp. 201-205, Tainan, Taiwan, Dec. 1998. | NSC88-2219-E-110-001 | Download |
| 043 | C.-C. Wang, C.-J. Huang, and P.-M. Lee, “A study for carru propagation delay of digital ratioed compressors,” 1998 Inter. Computer Symp. (ICS ’98) Workshop on Computer Architecture, pp. 30-36, Tainan, Taiwan, Dec. 1998. | NSC88-2219-E-110-001 | Download |
| 042 | C.-C. Wang and C.-F. Tsai, “Fuzzy data recall using polynomial bidirectional hetero-correlator,” 1998 Inter. Conf. on Systems, Men, and Cybernetics, pp. 1940-1945, Oct. 1998. | NSC88-2219-E-110-001 | Download |
| 041 | C.-C. Wang and Y.-L. Tseng, “A quadrature decoder/counter interface IC for AC inductor motor server control,” The 9th VLSI Design/CAD Symposium, pp. 281-284, Aug. 1998. | NSC87-2215-E-110-010 | Download |
| 040 | C.-C. Wang and K.-C. Tsai, “VLSI design of A 1.0 GHz 0.6-µm 8-Bit CLA using PLA-styled all-N-transistor Logic,” 1998 IEEE Inter. Symp. on Circuits & Systems (ISCAS ’98), vol. II, pp. 236-239, June 1998. | NSC86-2622-E-009-009 | Download |
| 039 | C.-F. Wu, C.-C. Wang, R.-T. Hwang, and C.-H. Kao, “Design of single-ended SRAM with high test coverage and short test time,” 1998 IEEE Inter. Symp. on Circuits & Systems (ISCAS ’98), vol. II, pp. 292-295, June 1998. | NSC87-2215-E-110-010 | Download |
| 038 | C.-F. Wu, C.-C. Wang, Y.-L. Tseng, and C.-H. Kao, “Design of fast dynamic CMOS comparators with fewer transistor count,” 1998 Inter. Conf. on Computer Systems Technology for Industrial Applications - Chip Technology, pp. 167-173, Apr. 1998. | Download | |
| 037 | C.-C. Wang, C.-F. Wu, R.-T. Hwang, and C.-H. Kao, “A low-power and high-speed dynmaic PLA circuit configuration for single-clock CMOS,” 1997 National Computer Symposium (NCS ’97), vol. 2, pp. C57-C62, Dec. 1997. | Download | |
| 036 | C.-C. Wang and G.-C. Lin, “VLSI implemnetation of a word-slice pipelined maximum selector for priority queues,” 1997 Inter. Symp. On Communications (ISCOM ’97), pp. 409-412, Dec. 1997. | NSC85-2622-E-009- 010-R | Download |
| 035 | C.-F. Wu, C.-C. Wang, R.-T. Hwang, and C.-H. Kao, “IDDQ testable configuration for PLAs by transformation into inverters,” 7th Inter. Symp. On IC Technology, Systems, & Applications (ISIC-97), pp. 398-401, Singapore, Sep. 1997. | NSC86-2215-E-110-013 | Download |
| 034 | C.-C. Wang andf H.-M. Yang, “A low-power high-speed FPGA logic module for DSP-specific applications’ design,” The 8th VLSI Design/CAD Symposium, pp. 325-328, Sun-Moon Lake, Aug. 1997. | NSC85-2622-E-009- 010-R | Download |
| 033 | C.-C. Wang and K.-C. Tsai, “A 1.0 GHz 64-bit parallel comparator using two-phase clocking ANT dynamic logic,” The 8th VLSI Design/CAD Symposium, pp. 149-152, Sun-Moon Lake, Aug. 1997. | NSC85-2622-E-009- 010-R | Download |
| 032 | C.-C. Wang and C.-F. Huang, “A study for swtich count reduction of FPGA by doubling flexibility of logic block,” The 7th VLSI Design/CAD Symposium, pp. 211-214, Aug. 1996. | NSC85-2215-E110-008 | Download |
| 031 | C.-C. Wang and C.-P. Kwan, “Low power technology mapping by hiding high-transition paths in invisible edges for LUT-based FPGAs,” 1997 IEEE Inter. Symp. On Ciercuits & Systems (ISCAS ’97), vol. 3, pp. 1536-1539, Hong Kong, June 1997. | NSC85-2215-E110-008 | Download |
| 030 | C.-C. Wang and Y.-C. Chen, “Hardware realization of multi-valued exponential bidirectional associative memory using current-mode circuits,” 1996 IEEE Inter. Symp. on Circuits & Systems, vol. III, pp. 503-506, May 1996. | NSC83-0404-E110-014 | Download |
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| 029 | C.-C. Wang and M.-D. Jeng, “Power estimation of internal nodes for finite state machine using Gray code encoding in state assignment,” National Computer Symposium 1995, pp. 842-949, Dec. 1995. | NSC84-0408-E-110-003 | Download |
| 028 | C.-C. Wang and Y.-C. Chen, “VLSI implementation of multi-valued exponential bidirectional associative memory using current-mode circuits,” National Computer Symposium 1995, pp. 114-121, Dec. 1995. | NSC83-0404-E-110-014 | Download |
| 027 | C.-C. Wang and Y.-C. Chen, “Realization of asymptotically stable multi-valued exponential bidirectional associative memory by current-mode VLSI circuit,” 1995 International Symposium on Articial Neural Networks, pp. F2-13 -18, Dec. 1995. | NSC83-0404-E-110-014 | Download |
| 026 | C.-C. Wang and I.-H. Horng, “Realization of bidirectional associative memory using a pseudo-parallel searching approach,” 1995 IEEE International Conference on Neural Networks, vol. 3, pp. 1502-1507, Dec. 1995. | NSC83-0408-E110-105 | Download |
| 025 | C.-C. Wang and C.-L. Fan, “Digital design of discrete exponential bidirectional associative memory,” 1995 IEEE International Conference on Neural Networks, vol. 4, pp. 2031-2036, Dec. 1995. | NSC84-0408-E-110-003 | Download |
| 024 | C.-C. Wang and M.-D. Jeng, “Power reduction for finite state machine by using Gray code encoding in state assignment,” The First Symposium on Computer and Communication Technology, pp. 154-158, Oct. 1995. | NSC84-0408-E-110-003 | Download |
| 023 | C.-C. Wang and Y.-C. Chen, “Current-mode implementation of asymptotically stable multi-valued exponential bidirectional associative memory,” The First Symposium on Computer and Communication Technology, pp. 143-148, Oct. 1995. | NSC83-0404-E-110-014 | Download |
| 022 | C.-C. Wang and M.-D. Jeng, “Transition reduction for finite state machine using modified Huffman encoding algorithm,” The 6th VLSI Design/CAD Symposium, pp. 294-297, Aug. 1995. | Download | |
| 021 | C.-C. W ang and Y.-L. Fan, “Low-power state assignment by greedy state pair grouping,” The 6th VLSI Design/CAD Symposium, pp. 298-301, Aug. 1995. | Download | |
| 020 | C.-C. Wang and J.-M. Wu, “Analysis and current-mode implementation of asymptotically stable exponential bidirectional associative memory,” 1995 IEEE Inter. Sym. on Circuits & Systems (ISCAS ’95), pp. 421-424, May 1995. | NSC84-0408-E-110-003 | Download |
| 019 | C.-C. Wang and C.-L. Fan, “Digital realization of exponential bidirectional associative memory with dynamic storage,” Proc. of 1995 Workshop on Computer Applications, pp. 85-89, Taichung, Apr. 1995. | NSC84-0408-E-110-003 | Download |
| 018 | C.-C. Wang and I.-H. Horng, “Digital bidirectional associative memory using a pseudo-parallel searching approach,” Proc. of 1995 Workshop on Computer Applications, pp. 70-74, Taichung, Apr. 1995. | NSC83-0408-E110-105 | Download |
| 017 | C.-C. Wang, S.-M. Hwang, and J.-P. Lee, “The absolute lowbound of the radix of multi-level discrete exponential bidirectional associative memories,” Inter. Neural Networks Conf., pp. 302-307, Tai-Nan, Dec. 1994. | NSC83-0404-E-110-014 | Download |
| 016 | C.-C. Wang, S.-M. Hwang, and J.-P. Lee, “The asymptotical stability of multi-level discrete exponential bidirectional associative memory,” 1994 Inter. Computer Symposium, pp. 1104-1107, Hsin-Chu, Dec. 1994. | NSC84-0408-E-110-003 | Download |
| 015 | C.-C. Wang and C.-R. Tsai, “Data compression by the recursive algorithm of exponential bidirectional associative memory, “ Inter. Conf. on Neural Information Processing ’94 - Seoul, Seoul, Korea, Oct. 17-20, 1994. | NSC82-0113-E-110-092-T | Download |
| 014 | C.-C. Wang and J.-P. Lee, “The absolute lowbound for the radix of exponential bidirectional associative memory, “Joint Conf. on Information Sciences ’94, Pinehurst, North Carolina, Nov. 14-16, 1994. | NSC82-0113-E-110-092-T | Download |
| 013 | C.-C. Wang and J.-P. Lee, “Searching algorithms of the optimal radix of exponential bidirectional associative memory, “ IEEE Inter. Conf. on Neur al Netowrks, pp. 1137-1142, Orlando, Florida, June 1994. | NSC82-0113-E-110-092-T | Download |
| 012 | C.-C. Wang and C.-R. Tsai, “An analysis of practical capacity of exponential bidirectional associative memory,” IEEE Inter. Conf. on Neural Netowrks, pp. 1074-1079, Orlando, Florida, June 1994. | NSC82-0113-E-110-092-T | Download |
| 011 | C.-C. Wang and H.-S. Don, “A modified measure for fuzzy subsethood,” Inter. Conf. on Fuzzy Theory & Technology, 1993. | Download | |
| 010 | C.-C. Wang and J.-P. Lee, “The decision making rule of multiple exponential bidirectional associative memories,” Inter. Joint Conf. on Neural Networks, pp. 2678-2681, Nagoya, Japan, Oct., 1993. | NSC82-0113-E-110-092-T | Download |
| 009 | T.-S. Horng, C.-C. Wang, and N. G. Alexopoulos, “Microstrip circuit design using neural networks,” IEEE MTT-S International Microwave Symposium, 1993, pp. 413-416, June 1993. | Download | |
| 008 | C.-C. Wang and H.-S. Don, “Measurement for fuzzy conditioning,” The First National Symposium on Fuzzy Set Theory & Applications, pp. 482-486, Hsin-Chu, Taiwan, June 1993. | Download | |
| 007 | C.-C. Wang and H.-S. Don, “A centralized multi-BAM network for thinking behaviors of the evidential reasoning,” The Fifth Irish Conference on Articial Intelligence and Cognitive Science (AICS ’92), Limerick, Ireland, Sep. 1992. | Download | |
| 006 | C.-C. Wang and H.-S. Don, “High-capacity discrete exponential BAM,” Inter. Joint Conf. on Neural Networks, vol. II, pp. 178-183, Baltimore, Maryland, June 1992 | Download | |
| 005 | C.-C. Wang and H.-S. Don, “A continuous belief function model for evidential reasoning,” Canadian Articial Intelligence Conf., AI ’92, Vancouver, British Columbia, Canada, May 1992. | Download | |
| 004 | C.-C. Wang and H.-S. Don, “Robust measures for fuzzy entropy and fuzzy conditioning,” Data Compression Conference ’92, Mar. 1992. | Download | |
| 003 | C.-C. Wang and H.-S. Don, “Evidential reasoning using neural networks,” Inter. Joint Conf. on Neural Networks, pp. 497-502, Singapore, Nov. 1991. | Download | |
| 002 | C.-C. Wang and H.-S. Don, “A geometrical approach to evidential reasoning,” IEEE Int. Conf. Systems, Man, and Cybernetics, Charlottesville, Virginia, Oct. 1991. | Download | |
| 001 | C.-C. Wang and H.-S. Don, “A new approach to evidential reasoning by a potential model,” Proc. ISMM Int. Conf. Computer Applications in Design, Simulation and Analysis, pp. 192-195, Las Vegas, Mar. 1991. | Download | |
